From owner-freebsd-arm@FreeBSD.ORG Fri Apr 19 22:34:50 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 1B4DD4EA for ; Fri, 19 Apr 2013 22:34:50 +0000 (UTC) (envelope-from ThomasSkibo@sbcglobal.net) Received: from nm7.access.bullet.mail.mud.yahoo.com (nm7.access.bullet.mail.mud.yahoo.com [66.94.237.208]) by mx1.freebsd.org (Postfix) with ESMTP id B556F27C for ; Fri, 19 Apr 2013 22:34:49 +0000 (UTC) Received: from [66.94.237.127] by nm7.access.bullet.mail.mud.yahoo.com with NNFMP; 19 Apr 2013 22:31:35 -0000 Received: from [98.138.84.212] by tm2.access.bullet.mail.mud.yahoo.com with NNFMP; 19 Apr 2013 22:31:35 -0000 Received: from [127.0.0.1] by smtp101.sbc.mail.ne1.yahoo.com with NNFMP; 19 Apr 2013 22:31:35 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sbcglobal.net; s=s1024; t=1366410695; bh=/AwkfNVi3o3D7dIehQbdtM/WGkR9NccgvztXgm0yT10=; h=X-Yahoo-Newman-Id:X-Yahoo-Newman-Property:X-YMail-OSG:X-Yahoo-SMTP:X-Rocket-Received:Message-ID:Date:From:User-Agent:MIME-Version:To:Subject:Content-Type:Content-Transfer-Encoding; b=coUxTt5uiGP2SNZJUjtI5v/9NmOxAKpfR/0nkQyMV+4BT3snWKFzTXOif9uI5Hs2eaR9833oVdcoWcIej0dGa+PNEiMGojYDqWCpyixEMWvsPKvUji1EjP7XmzGQvWX7Nisi/He1J3GHc5F/TwmdLGz1YgO4jvZVGhwBTdGbOVs= X-Yahoo-Newman-Id: 292859.13659.bm@smtp101.sbc.mail.ne1.yahoo.com X-Yahoo-Newman-Property: ymail-3 X-YMail-OSG: 1_ghcdcVM1kICc4APdvwQZrTqGHEQKLSnd7ib_WlUXsrjHp p1Zf_my7_n7UR74NjhvNiPRhI4SDFT3b7nkU09CeRjPpCyfPBai7yMDiaVsb 6DuTFc2JSJdTt6s_6uUzBY38JgmtJnxg1Q54UOHFvUV.CMae5hadK0AKBJTn DwXF4Cl4SADGS87VkfBm.0fVSKSFHFVXPTlaBbBZNjN_AFQnA9eW_.CJS_EE .p_TKoboctig8wc.0KMSCvgTjuuQblV00qYwdvmqm5OXDUrSAusidG3uyBAU QTk.Gajir_iWQ1d2wGbFGXvjueU8GpmxArwgrZQKPU5XEn_oUtXsFpzKNxtw qOMCENUNpq_Foh402a0MaC8OMoOv.WX_0bwZwEDmQm4plFNFjmKKmSRPVROS oK5lt6vdPOvmRfdylIdpV.9wEPGjtXyxKVkJwUw2JzTDi8VLJuYI5SX3O.Yq 7RrQCv9YhtM54wOZTZ_yXkWZGxHjRpjnxQxUO X-Yahoo-SMTP: tUxoRneswBA21azLM.3ybMESf0mC2bFhTbmt0VU5ervH0kqi5lo- X-Rocket-Received: from [192.168.1.9] (ThomasSkibo@71.139.162.8 with plain) by smtp101.sbc.mail.ne1.yahoo.com with SMTP; 19 Apr 2013 15:31:35 -0700 PDT Message-ID: <5171C5C6.7080907@sbcglobal.net> Date: Fri, 19 Apr 2013 15:31:34 -0700 From: Thomas Skibo User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.8; rv:17.0) Gecko/20130328 Thunderbird/17.0.5 MIME-Version: 1.0 To: freebsd-arm@freebsd.org Subject: gic.c and interrupt priority mask register (GICC_PMR) Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Apr 2013 22:34:50 -0000 Hello. I mentioned this as an aside in another email but I'd like to revisit it. My Zynq port doesn't work unless I initialize the GIC interrupt priority mask register (GICC_PMR) which I do in a hack in zy7_machdep.c. The GICC_PMR register is never touched in gic.c and I wonder how other ARM ports work without having it initialized. I figure either they use a different interrupt controller, their GIC implementation has a different reset value for the PMR, or a boot-loader sets up the register before the kernel is entered. The ARM Generic Interrupt Controller Architecture Specification (version 2.0) states that the reset value of GICC_PMR is 0 which masks all interrupts. So shouldn't gic.c initialize it to 0xff if the PMR functionality isn't used? --Thomas Something like this? Index: sys/arm/arm/gic.c =================================================================== --- sys/arm/arm/gic.c (revision 249650) +++ sys/arm/arm/gic.c (working copy) @@ -134,6 +134,9 @@ /* Enable CPU interface */ gic_c_write_4(GICC_CTLR, 1); + /* Set priority mask register. */ + gic_c_write_4(GICC_PMR, 0xff); + /* Enable interrupt distribution */ gic_d_write_4(GICD_CTLR, 0x01); @@ -199,6 +202,9 @@ /* Enable CPU interface */ gic_c_write_4(GICC_CTLR, 1); + /* Set priority mask register. */ + gic_c_write_4(GICC_PMR, 0xff); + /* Enable interrupt distribution */ gic_d_write_4(GICD_CTLR, 0x01); -- -------- Thomas Skibo ThomasSkibo@sbcglobal.net