From owner-p4-projects@FreeBSD.ORG Sat Dec 15 03:49:00 2007 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id C46E316A468; Sat, 15 Dec 2007 03:48:59 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 63BD616A417 for ; Sat, 15 Dec 2007 03:48:59 +0000 (UTC) (envelope-from marcel@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 4B77213C45A for ; Sat, 15 Dec 2007 03:48:59 +0000 (UTC) (envelope-from marcel@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id lBF3mxjV007837 for ; Sat, 15 Dec 2007 03:48:59 GMT (envelope-from marcel@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id lBF3mxgc007834 for perforce@freebsd.org; Sat, 15 Dec 2007 03:48:59 GMT (envelope-from marcel@freebsd.org) Date: Sat, 15 Dec 2007 03:48:59 GMT Message-Id: <200712150348.lBF3mxgc007834@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to marcel@freebsd.org using -f From: Marcel Moolenaar To: Perforce Change Reviews Cc: Subject: PERFORCE change 130932 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 15 Dec 2007 03:49:00 -0000 http://perforce.freebsd.org/chv.cgi?CH=130932 Change 130932 by marcel@marcel_cluster on 2007/12/15 03:48:14 Re-apply diffs to the moved files. Affected files ... .. //depot/projects/powerpc/sys/powerpc/aim/locore.S#2 edit .. //depot/projects/powerpc/sys/powerpc/aim/machdep.c#2 edit .. //depot/projects/powerpc/sys/powerpc/aim/ofw_machdep.c#2 edit .. //depot/projects/powerpc/sys/powerpc/aim/swtch.S#2 edit .. //depot/projects/powerpc/sys/powerpc/aim/trap.c#2 edit .. //depot/projects/powerpc/sys/powerpc/aim/vm_machdep.c#2 edit Differences ... ==== //depot/projects/powerpc/sys/powerpc/aim/locore.S#2 (text+ko) ==== @@ -183,6 +183,28 @@ b OF_exit /* + * Kernel entry point for application/auxiliary + * processors (APs). + */ + .globl __start_ap +__start_ap: + li 8,0 + li 9,0x100 + mtctr 9 +1: + dcbf 0,8 + icbi 0,8 + addi 8,8,0x20 + bdnz 1b + + sync + isync + + bl mi_startup +9: + b 9b + +/* * int setfault() * * Similar to setjmp to setup for handling faults on accesses to user memory. ==== //depot/projects/powerpc/sys/powerpc/aim/machdep.c#2 (text+ko) ==== @@ -114,6 +114,7 @@ #include #include #include +#include #include #include @@ -127,8 +128,8 @@ int cold = 1; -struct pcpu __pcpu[MAXCPU]; -struct trapframe frame0; +static struct pcpu pcpu0; +static struct trapframe frame0; vm_offset_t kstack0; vm_offset_t kstack0_phys; @@ -234,14 +235,6 @@ EVENTHANDLER_REGISTER(shutdown_final, powerpc_ofw_shutdown, 0, SHUTDOWN_PRI_LAST); - -#ifdef SMP - /* - * OK, enough kmem_alloc/malloc state should be up, lets get on with it! - */ - mp_start(); /* fire up the secondaries */ - mp_announce(); -#endif /* SMP */ } extern char kernel_text[], _end[]; @@ -298,7 +291,7 @@ /* * Set up per-cpu data. */ - pc = &__pcpu[0]; + pc = &pcpu0; pcpu_init(pc, 0, sizeof(struct pcpu)); pc->pc_curthread = &thread0; pc->pc_curpcb = thread0.td_pcb; @@ -804,6 +797,22 @@ tf->srr0 = entry; tf->srr1 = PSL_MBO | PSL_USERSET | PSL_FE_DFLT; + + /* + * Reset the hardware debug registers if they were in use. + * They won't have any meaning for the newly exec'd process. + */ + if (td->td_pcb->pcb_flags & PCB_DBREGS) { + if (td->td_pcb == PCPU_GET(curpcb)) { + /* + * Clear the debug registers on the running + * CPU, otherwise they will end up affecting + * the next process we switch to. + */ + mtspr(SPR_DABR, 0); + } + } + td->td_pcb->pcb_flags = 0; } @@ -821,8 +830,12 @@ int fill_dbregs(struct thread *td, struct dbreg *dbregs) { - /* No debug registers on PowerPC */ - return (ENOSYS); + int has_dbregs; + + has_dbregs = (td->td_pcb->pcb_flags & PCB_DBREGS) ? 1 : 0; + dbregs->dabr = (has_dbregs) ? td->td_pcb->pcb_dabr : 0; + dbregs->wppc = (has_dbregs) ? td->td_pcb->pcb_wppc : 0; + return (0); } int @@ -854,8 +867,17 @@ int set_dbregs(struct thread *td, struct dbreg *dbregs) { - /* No debug registers on PowerPC */ - return (ENOSYS); + + td->td_pcb->pcb_dabr = dbregs->dabr; + td->td_pcb->pcb_wppc = 0; + if (dbregs->dabr != 0) + td->td_pcb->pcb_flags |= PCB_DBREGS; + else + td->td_pcb->pcb_flags &= ~PCB_DBREGS; + mtspr(SPR_DABRX, 1); + if (td == curthread) + mtspr(SPR_DABR, dbregs->dabr); + return (0); } int ==== //depot/projects/powerpc/sys/powerpc/aim/ofw_machdep.c#2 (text+ko) ==== @@ -63,7 +63,6 @@ static struct mem_region OFfree[OFMEM_REGIONS + 3]; extern register_t ofmsr[5]; -extern struct pcpu __pcpu[MAXCPU]; extern struct pmap ofw_pmap; static int (*ofwcall)(void *); @@ -279,6 +278,33 @@ } void +OF_start_cpu(phandle_t cpu, void (*entry)(void *), void *arg) +{ + static struct { + cell_t name; + cell_t nargs; + cell_t nreturns; + cell_t cpu; + cell_t entry; + cell_t arg; + } args = { + (cell_t)"start-cpu", + 3, + 0 + }; + + printf("XXX: %s: cpu=%x, entry=%p, arg=%p...", __func__, cpu, + entry, arg); + + args.cpu = (cell_t)cpu; + args.entry = (cell_t)entry; + args.arg = (cell_t)arg; + openfirmware(&args); + + printf(" ok\n"); +} + +void OF_getetheraddr(device_t dev, u_char *addr) { phandle_t node; ==== //depot/projects/powerpc/sys/powerpc/aim/swtch.S#2 (text+ko) ==== @@ -94,7 +94,16 @@ mr %r14,%r3 /* Copy the old thread ptr... */ mr %r15,%r4 /* and the new thread ptr in scratch */ - lwz %r6,PCB_FLAGS(%r5) /* Save FPU context if needed */ + lwz %r6,PCB_FLAGS(%r5) + /* Save and reset the DABR if needed */ + andi. %r16, %r6, PCB_DBREGS + beq .L0 + mfspr %r16, SPR_DABR + stw %r16, PCB_DABR(%r5) + li %r16, 0 + mtspr SPR_DABR, %r16 +.L0: + /* Save FPU context if needed */ andi. %r6, %r6, PCB_FPU beq .L1 bl save_fpu @@ -111,13 +120,18 @@ stw %r17,PC_CURPCB(%r7) lwz %r6, PCB_FLAGS(%r17) /* Restore FPU context if needed */ + andi. %r16, %r6, PCB_DBREGS + beq .L2 + lwz %r16, PCB_DABR(%r17) + mtspr SPR_DABR, %r16 +.L2: andi. %r6, %r6, PCB_FPU - beq .L2 + beq .L3 mr %r3,%r15 /* Pass curthread to enable_fpu */ bl enable_fpu /* thread to restore is in r3 */ -.L2: +.L3: mr %r3,%r17 /* Recover PCB ptr */ lmw %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs */ mr %r2,%r12 ==== //depot/projects/powerpc/sys/powerpc/aim/trap.c#2 (text+ko) ==== @@ -174,6 +174,13 @@ break; case EXC_DSI: + if (frame->dsisr & DSISR_DABR) { + td->td_pcb->pcb_wppc = frame->srr0; + frame->dar = td->td_pcb->pcb_dabr & ~7; + sig = SIGTRAP; + break; + } + /* FALLTHROUGH */ case EXC_ISI: sig = trap_pfault(frame, 1); break; ==== //depot/projects/powerpc/sys/powerpc/aim/vm_machdep.c#2 (text+ko) ==== @@ -90,6 +90,7 @@ #include #include #include +#include #include @@ -269,6 +270,12 @@ void cpu_thread_exit(struct thread *td) { + + /* Disable any hardware breakpoints. */ + if (td->td_pcb->pcb_flags & PCB_DBREGS) { + mtspr(SPR_DABR, 0); + td->td_pcb->pcb_flags &= ~PCB_DBREGS; + } } void