From owner-freebsd-hackers@FreeBSD.ORG Thu Feb 27 20:09:25 2014 Return-Path: Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 1A7419E3 for ; Thu, 27 Feb 2014 20:09:25 +0000 (UTC) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher ADH-CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id E77A3108B for ; Thu, 27 Feb 2014 20:09:24 +0000 (UTC) Received: from jhbbsd.localnet (unknown [209.249.190.124]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 466F2B97B; Thu, 27 Feb 2014 15:09:23 -0500 (EST) From: John Baldwin To: freebsd-hackers@freebsd.org Subject: Re: [PATCH] Add MSI support to puc(9) Date: Thu, 27 Feb 2014 13:30:02 -0500 User-Agent: KMail/1.13.5 (FreeBSD/8.4-CBSD-20130906; KDE/4.5.5; amd64; ; ) References: In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201402271330.02699.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Thu, 27 Feb 2014 15:09:23 -0500 (EST) Cc: Ryan Stone X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Feb 2014 20:09:25 -0000 On Wednesday, February 26, 2014 2:22:48 pm Ryan Stone wrote: > The Exar XR17V358 is a PCIe device and it supports a single MSI > interrupt. This patch will make puc(9) use an MSI interrupt on > devices that declare that they support it: > > http://people.freebsd.org/~rstone/patches/puc_msi.diff > > This patch may be overly paranoid; I was worried that it's wasn't > guaranteed that I could always call pci_alloc_msi() (forgetting that > the P in puc stands for PCI) so I added a new puc_cfg_cmd that > individual device config methods could implement to advertise support > rather than depending on pci_alloc_msi() to behave sanely. > > I have tested the patch on both a XR17V358 and a XR17V258 (which is a > legacy PCI device that does not support PCI) I would suggest reworking this so that you try MSI for all PCI devices. I would do this by removing the 'sc_irid = 0' from puc_bfe_attach() so that it can be set by callers. You could then add attach/detach routines in puc_pci.c that use pci_alloc_msi() and set sc_irid to 1 if MSI works. The sc_irid value would also work as a flag for knowing if detach needs to call pci_release_msi() (or puc_pci_attach() handling failure in puc_bfe_attach()) (though I wouldn't be opposed to keeping sc_msi as a separate flag). -- John Baldwin