Date: Sat, 17 Oct 2015 19:52:17 +0000 (UTC) From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r289466 - head/sys/arm64/arm64 Message-ID: <201510171952.t9HJqHIf065193@repo.freebsd.org>
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Author: andrew Date: Sat Oct 17 19:52:17 2015 New Revision: 289466 URL: https://svnweb.freebsd.org/changeset/base/289466 Log: Replace build_section_pagetable with build_l1_block_pagetable as it takes an extra argument to specify the number of 1GiB pages to map. This should be a nop as we are only mapping a single page, but when we move to use an extra level of page tables we will be able to map a second block, e.g. if the kernel was loaded over a 1GiB boundary. Modified: head/sys/arm64/arm64/locore.S Modified: head/sys/arm64/arm64/locore.S ============================================================================== --- head/sys/arm64/arm64/locore.S Sat Oct 17 19:48:17 2015 (r289465) +++ head/sys/arm64/arm64/locore.S Sat Oct 17 19:52:17 2015 (r289466) @@ -379,7 +379,8 @@ create_pagetables: mov x7, #DEVICE_MEM mov x8, #(SOCDEV_VA) /* VA start */ mov x9, #(SOCDEV_PA) /* PA start */ - bl build_section_pagetable + mov x10, #1 + bl build_l1_block_pagetable #endif /* Create the VA = PA map */ @@ -387,36 +388,38 @@ create_pagetables: mov x7, #NORMAL_UNCACHED /* Uncached as it's only needed early on */ mov x9, x27 mov x8, x9 /* VA start (== PA start) */ - bl build_section_pagetable + mov x10, #1 + bl build_l1_block_pagetable /* Restore the Link register */ mov x30, x5 ret /* - * Builds a 1 GiB page table entry - * x6 = L1 table - * x7 = Type (0 = Device, 1 = Normal) - * x8 = VA start - * x9 = PA start (trashed) + * Builds an L1 -> L2 table descriptor + * + * This is a link for a 1GiB block of memory with up to 2MiB regions mapped + * within it by build_l2_block_pagetable. + * + * x6 = L1 table + * x8 = Virtual Address + * x9 = L2 PA (trashed) * x11, x12 and x13 are trashed */ -build_section_pagetable: +link_l1_pagetable: /* - * Build the L1 table entry. + * Link an L1 -> L2 table entry. */ /* Find the table index */ lsr x11, x8, #L1_SHIFT and x11, x11, #Ln_ADDR_MASK /* Build the L1 block entry */ - lsl x12, x7, #2 - orr x12, x12, #L1_BLOCK - orr x12, x12, #(ATTR_AF) + mov x12, #L1_TABLE /* Only use the output address bits */ - lsr x9, x9, #L1_SHIFT - orr x12, x12, x9, lsl #L1_SHIFT + lsr x9, x9, #12 + orr x12, x12, x9, lsl #12 /* Store the entry */ str x12, [x6, x11, lsl #3] @@ -424,35 +427,48 @@ build_section_pagetable: ret /* - * Builds an L1 -> L2 table descriptor - * - * This is a link for a 1GiB block of memory with up to 2MiB regions mapped - * within it by build_l1_block_pagetable. - * + * Builds count 1 GiB page table entry * x6 = L1 table - * x8 = Virtual Address - * x9 = L2 PA (trashed) + * x7 = Type (0 = Device, 1 = Normal) + * x8 = VA start + * x9 = PA start (trashed) + * x10 = Entry count (TODO) * x11, x12 and x13 are trashed */ -link_l1_pagetable: +build_l1_block_pagetable: /* - * Link an L1 -> L2 table entry. + * Build the L1 table entry. */ /* Find the table index */ lsr x11, x8, #L1_SHIFT and x11, x11, #Ln_ADDR_MASK /* Build the L1 block entry */ - mov x12, #L1_TABLE + lsl x12, x7, #2 + orr x12, x12, #L1_BLOCK + orr x12, x12, #(ATTR_AF) +#ifdef SMP + orr x12, x12, ATTR_SH(ATTR_SH_IS) +#endif /* Only use the output address bits */ - lsr x9, x9, #12 - orr x12, x12, x9, lsl #12 + lsr x9, x9, #L1_SHIFT + + /* Set the physical address for this virtual address */ +1: orr x12, x12, x9, lsl #L1_SHIFT /* Store the entry */ str x12, [x6, x11, lsl #3] - ret + /* Clear the address bits */ + and x12, x12, #ATTR_MASK_L + + sub x10, x10, #1 + add x11, x11, #1 + add x9, x9, #1 + cbnz x10, 1b + +2: ret /* * Builds count 2 MiB page table entry
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