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Date:      Sun, 26 Jul 1998 11:49:34 -0500 (EST)
From:      "John S. Dyson" <dyson@iquest.net>
To:        roberto@keltia.freenix.fr (Ollivier Robert)
Cc:        freebsd-current@FreeBSD.ORG
Subject:   Re: New LINT options: what is VM coloring?
Message-ID:  <199807261649.LAA01167@dyson.iquest.net>
In-Reply-To: <19980726141137.A11215@keltia.freenix.fr> from Ollivier Robert at "Jul 26, 98 02:11:37 pm"

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Ollivier Robert said:
> According to David Greenman:
> > be a big win for direct-mapped caches (e.g. most Pentium L2 caches), but
> > loses effectiveness with set-associative caches (e.g. Pentium Pro, which
> > has a set size of 4).
> 
> The K6 has a 2-way set associative cache so I guess it is not interesting
> to use page coloring but does anyone know what kind of L2 cache an ASUS T2P4
> use ? It is a P5-class motherboard so it is possible that the cache is
> direct-mapped, no ?
> 
David is essentially right.  However, the page coloring code (that has
been in -current for the last >1yr) goes a little too far and colors
even the 1st level cache (I know -- I did it.)  Also, there is the issue
of proper choice of initial color values, so I used an ad-hoc approach that
appears to work correctly most of the time.

Almost all P5 MB's use direct mapped 2nd level caches.  Only certain of the
specialized P5 cache mgr chips do a 4way set assoc scheme.

-- 
John                  | Never try to teach a pig to sing,
dyson@iquest.net      | it makes one look stupid
jdyson@nc.com         | and it irritates the pig.

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