Date: Fri, 15 May 2020 20:01:30 +0000 (UTC) From: Mitchell Horne <mhorne@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r361086 - in stable/12/sys/riscv: include riscv Message-ID: <202005152001.04FK1UXW055788@repo.freebsd.org>
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Author: mhorne Date: Fri May 15 20:01:30 2020 New Revision: 361086 URL: https://svnweb.freebsd.org/changeset/base/361086 Log: MFC r360551-r360554 This set of changes allows booting with OpenSBI v0.7. r360551: Make mpentry independent of _start r360552: Add support for HSM SBI extension r360553: Use the HSM SBI extension to start APs r360554: Use the HSM SBI extension to halt CPUs Modified: stable/12/sys/riscv/include/sbi.h stable/12/sys/riscv/riscv/locore.S stable/12/sys/riscv/riscv/machdep.c stable/12/sys/riscv/riscv/mp_machdep.c stable/12/sys/riscv/riscv/sbi.c Modified: stable/12/sys/riscv/include/sbi.h ============================================================================== --- stable/12/sys/riscv/include/sbi.h Fri May 15 18:51:20 2020 (r361085) +++ stable/12/sys/riscv/include/sbi.h Fri May 15 20:01:30 2020 (r361086) @@ -55,6 +55,7 @@ #define SBI_ERR_INVALID_PARAM -3 #define SBI_ERR_DENIED -4 #define SBI_ERR_INVALID_ADDRESS -5 +#define SBI_ERR_ALREADY_AVAILABLE -6 /* SBI Base Extension */ #define SBI_EXT_ID_BASE 0x10 @@ -66,6 +67,16 @@ #define SBI_BASE_GET_MARCHID 5 #define SBI_BASE_GET_MIMPID 6 +/* Hart State Management (HSM) Extension */ +#define SBI_EXT_ID_HSM 0x48534D +#define SBI_HSM_HART_START 0 +#define SBI_HSM_HART_STOP 1 +#define SBI_HSM_HART_STATUS 2 +#define SBI_HSM_STATUS_STARTED 0 +#define SBI_HSM_STATUS_STOPPED 1 +#define SBI_HSM_STATUS_START_PENDING 2 +#define SBI_HSM_STATUS_STOP_PENDING 3 + /* Legacy Extensions */ #define SBI_SET_TIMER 0 #define SBI_CONSOLE_PUTCHAR 1 @@ -127,6 +138,30 @@ sbi_probe_extension(long id) { return (SBI_CALL1(SBI_EXT_ID_BASE, SBI_BASE_PROBE_EXTENSION, id).value); } + +/* Hart State Management extension functions. */ + +/* + * Start execution on the specified hart at physical address start_addr. The + * register a0 will contain the hart's ID, and a1 will contain the value of + * priv. + */ +int sbi_hsm_hart_start(u_long hart, u_long start_addr, u_long priv); + +/* + * Stop execution on the current hart. Interrupts should be disabled, or this + * function may return. + */ +void sbi_hsm_hart_stop(void); + +/* + * Get the execution status of the specified hart. The status will be one of: + * - SBI_HSM_STATUS_STARTED + * - SBI_HSM_STATUS_STOPPED + * - SBI_HSM_STATUS_START_PENDING + * - SBI_HSM_STATUS_STOP_PENDING + */ +int sbi_hsm_hart_status(u_long hart); /* Legacy extension functions. */ static __inline void Modified: stable/12/sys/riscv/riscv/locore.S ============================================================================== --- stable/12/sys/riscv/riscv/locore.S Fri May 15 18:51:20 2020 (r361085) +++ stable/12/sys/riscv/riscv/locore.S Fri May 15 20:01:30 2020 (r361086) @@ -53,13 +53,6 @@ .text .globl _start _start: - /* Get the physical address kernel loaded to */ - lla t0, virt_map - ld t1, 0(t0) - sub t1, t1, t0 - li t2, KERNBASE - sub s9, t2, t1 /* s9 = physmem base */ - /* * a0 = hart id * a1 = dtbp @@ -81,6 +74,9 @@ _start: * Page tables */ 1: + /* Get the kernel's load address */ + jal get_physmem + /* Add L1 entry for kernel */ lla s1, pagetable_l1 lla s2, pagetable_l2 /* Link to next level PN */ @@ -220,6 +216,17 @@ va: call _C_LABEL(initriscv) /* Off we go */ call _C_LABEL(mi_startup) +/* + * Get the physical address the kernel is loaded to. Returned in s9. + */ +get_physmem: + lla t0, virt_map /* physical address of virt_map */ + ld t1, 0(t0) /* virtual address of virt_map */ + sub t1, t1, t0 /* calculate phys->virt delta */ + li t2, KERNBASE + sub s9, t2, t1 /* s9 = physmem base */ + ret + .align 4 initstack: .space (PAGE_SIZE * KSTACK_PAGES) @@ -298,6 +305,9 @@ ENTRY(mpentry) /* Setup stack pointer */ lla t0, bootstack ld sp, 0(t0) + + /* Get the kernel's load address */ + jal get_physmem /* Setup supervisor trap vector */ lla t0, mpva Modified: stable/12/sys/riscv/riscv/machdep.c ============================================================================== --- stable/12/sys/riscv/riscv/machdep.c Fri May 15 18:51:20 2020 (r361085) +++ stable/12/sys/riscv/riscv/machdep.c Fri May 15 20:01:30 2020 (r361086) @@ -471,9 +471,16 @@ void cpu_halt(void) { + /* + * Try to power down using the HSM SBI extension and fall back to a + * simple wfi loop. + */ intr_disable(); + if (sbi_probe_extension(SBI_EXT_ID_HSM) != 0) + sbi_hsm_hart_stop(); for (;;) __asm __volatile("wfi"); + /* NOTREACHED */ } /* Modified: stable/12/sys/riscv/riscv/mp_machdep.c ============================================================================== --- stable/12/sys/riscv/riscv/mp_machdep.c Fri May 15 18:51:20 2020 (r361085) +++ stable/12/sys/riscv/riscv/mp_machdep.c Fri May 15 20:01:30 2020 (r361086) @@ -96,6 +96,7 @@ static uint32_t cpu_reg[MAXCPU][2]; #endif static device_t cpu_list[MAXCPU]; +void mpentry(u_long hartid); void init_secondary(uint64_t); static struct mtx ap_boot_mtx; @@ -301,7 +302,7 @@ smp_after_idle_runnable(void *arg __unused) struct pcpu *pc; int cpu; - for (cpu = 1; cpu < mp_ncpus; cpu++) { + for (cpu = 1; cpu <= mp_maxid; cpu++) { if (bootstacks[cpu] != NULL) { pc = pcpu_find(cpu); while ((void *)atomic_load_ptr(&pc->pc_curpcb) == NULL) @@ -403,9 +404,11 @@ static boolean_t cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg) { struct pcpu *pcpup; + vm_paddr_t start_addr; uint64_t hart; u_int cpuid; int naps; + int error; /* Check if this hart supports MMU. */ if (OF_getproplen(node, "mmu-type") < 0) @@ -444,6 +447,23 @@ cpu_init_fdt(u_int id, phandle_t node, u_int addr_size /* Check if we are able to start this cpu */ if (cpuid > mp_maxid) return (0); + + /* + * Depending on the SBI implementation, APs are waiting either in + * locore.S or to be activated explicitly, via SBI call. + */ + if (sbi_probe_extension(SBI_EXT_ID_HSM) != 0) { + start_addr = pmap_kextract((vm_offset_t)mpentry); + error = sbi_hsm_hart_start(hart, start_addr, 0); + if (error != 0) { + mp_ncpus--; + + /* Send a warning to the user and continue. */ + printf("AP %u (hart %lu) failed to start, error %d\n", + cpuid, hart, error); + return (0); + } + } pcpup = &__pcpu[cpuid]; pcpu_init(pcpup, cpuid, sizeof(struct pcpu)); Modified: stable/12/sys/riscv/riscv/sbi.c ============================================================================== --- stable/12/sys/riscv/riscv/sbi.c Fri May 15 18:51:20 2020 (r361085) +++ stable/12/sys/riscv/riscv/sbi.c Fri May 15 20:01:30 2020 (r361086) @@ -113,6 +113,31 @@ sbi_print_version(void) printf("SBI Specification Version: %u.%u\n", major, minor); } +int +sbi_hsm_hart_start(u_long hart, u_long start_addr, u_long priv) +{ + struct sbi_ret ret; + + ret = SBI_CALL3(SBI_EXT_ID_HSM, SBI_HSM_HART_START, hart, start_addr, priv); + return (ret.error != 0 ? (int)ret.error : 0); +} + +void +sbi_hsm_hart_stop(void) +{ + (void)SBI_CALL0(SBI_EXT_ID_HSM, SBI_HSM_HART_STOP); +} + +int +sbi_hsm_hart_status(u_long hart) +{ + struct sbi_ret ret; + + ret = SBI_CALL1(SBI_EXT_ID_HSM, SBI_HSM_HART_STATUS, hart); + + return (ret.error != 0 ? (int)ret.error : (int)ret.value); +} + void sbi_init(void) {
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