From owner-cvs-all@FreeBSD.ORG Sun Sep 30 22:30:49 2007 Return-Path: Delivered-To: cvs-all@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 43FBB16A419; Sun, 30 Sep 2007 22:30:49 +0000 (UTC) (envelope-from jroberson@chesapeake.net) Received: from webaccess-cl.virtdom.com (webaccess-cl.virtdom.com [216.240.101.25]) by mx1.freebsd.org (Postfix) with ESMTP id E2D6C13C461; Sun, 30 Sep 2007 22:30:48 +0000 (UTC) (envelope-from jroberson@chesapeake.net) Received: from [192.168.1.103] (c-67-160-44-208.hsd1.wa.comcast.net [67.160.44.208]) (authenticated bits=0) by webaccess-cl.virtdom.com (8.13.6/8.13.6) with ESMTP id l8UMUf5v053147 (version=TLSv1/SSLv3 cipher=DHE-DSS-AES256-SHA bits=256 verify=NO); Sun, 30 Sep 2007 18:30:42 -0400 (EDT) (envelope-from jroberson@chesapeake.net) Date: Sun, 30 Sep 2007 15:33:27 -0700 (PDT) From: Jeff Roberson X-X-Sender: jroberson@10.0.0.1 To: Peter Grehan In-Reply-To: <46FBDFE8.9050909@freebsd.org> Message-ID: <20070930153101.T583@10.0.0.1> References: <200709271639.l8RGdREd032105@repoman.freebsd.org> <46FBDFE8.9050909@freebsd.org> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Cc: cvs-src@FreeBSD.org, Jeff Roberson , src-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/kern sched_ule.c X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 30 Sep 2007 22:30:49 -0000 On Thu, 27 Sep 2007, Peter Grehan wrote: >> - Assert that we're not trying to compile ULE on an unsupported >> architecture. To date, I believe only i386 and amd64 have implemented >> the third cpu switch argument required. > > ARM has it: > > http://www.freebsd.org/cgi/cvsweb.cgi/src/sys/arm/arm/swtch.S?r1=1.20#rev1.20 Oh excellent Peter. I hadn't seen that. Did you verify that it works? Does arm support SMP? It looks like it does not? > > PPC doesn't, though I think you told me that it was only required when > running MP. Is that still the case ? For UP it doesn't need to wait for blocked lock to clear but it does need to set td_lock. On UP there are no special synchronization requirements so it can happen as the very first instruction in cpu_switch. Jeff > > later, > > Peter. >