From owner-svn-src-all@FreeBSD.ORG Sat Jul 20 07:58:04 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 88508C30; Sat, 20 Jul 2013 07:58:04 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 7AD6C920; Sat, 20 Jul 2013 07:58:04 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id r6K7w4DC058613; Sat, 20 Jul 2013 07:58:04 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id r6K7w4cQ058611; Sat, 20 Jul 2013 07:58:04 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <201307200758.r6K7w4cQ058611@svn.freebsd.org> From: Pyun YongHyeon Date: Sat, 20 Jul 2013 07:58:04 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r253483 - head/sys/dev/bge X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 20 Jul 2013 07:58:04 -0000 Author: yongari Date: Sat Jul 20 07:58:03 2013 New Revision: 253483 URL: http://svnweb.freebsd.org/changeset/base/253483 Log: Add support for upcoming BCM5725 (ASIC 5762) controller. This is a new 1Gb server controller chip that will be going into production soon. BCM5725 combines MAC with triple-speed PHY, a Network Controller Sideband Interface (NC-SI) and on-chip memory buffer in a single device. BCM5725 has an Application Processing Engine (APE) that is capable of on-chip management and offloading features. BCM5725 supports high-precision clock, time stamp registers for receive/transmit packets and programmable trigger inputs and watchdog timeouts. These new features are not yet supported by bge(4). Many thanks to Broadcom for continuing to support FreeBSD! Submitted by: Geans Pin geanspin@Broacom (initial version) Reviewed by: Geans Pin geanspin@Broacom H/W donated by: Broadcom Modified: head/sys/dev/bge/if_bge.c head/sys/dev/bge/if_bgereg.h Modified: head/sys/dev/bge/if_bge.c ============================================================================== --- head/sys/dev/bge/if_bge.c Sat Jul 20 07:29:19 2013 (r253482) +++ head/sys/dev/bge/if_bge.c Sat Jul 20 07:58:03 2013 (r253483) @@ -176,6 +176,8 @@ static const struct bge_type { { BCOM_VENDORID, BCOM_DEVICEID_BCM5721 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5722 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5723 }, + { BCOM_VENDORID, BCOM_DEVICEID_BCM5725 }, + { BCOM_VENDORID, BCOM_DEVICEID_BCM5727 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5750 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5750M }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5751 }, @@ -195,6 +197,7 @@ static const struct bge_type { { BCOM_VENDORID, BCOM_DEVICEID_BCM5761E }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5761S }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5761SE }, + { BCOM_VENDORID, BCOM_DEVICEID_BCM5762 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5764 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5780 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5780S }, @@ -310,6 +313,7 @@ static const struct bge_revision { { BGE_CHIPID_BCM5722_A0, "BCM5722 A0" }, { BGE_CHIPID_BCM5761_A0, "BCM5761 A0" }, { BGE_CHIPID_BCM5761_A1, "BCM5761 A1" }, + { BGE_CHIPID_BCM5762_A0, "BCM5762 A0" }, { BGE_CHIPID_BCM5784_A0, "BCM5784 A0" }, { BGE_CHIPID_BCM5784_A1, "BCM5784 A1" }, /* 5754 and 5787 share the same ASIC ID */ @@ -354,6 +358,7 @@ static const struct bge_revision bge_maj { BGE_ASICREV_BCM5717, "unknown BCM5717" }, { BGE_ASICREV_BCM5719, "unknown BCM5719" }, { BGE_ASICREV_BCM5720, "unknown BCM5720" }, + { BGE_ASICREV_BCM5762, "unknown BCM5762" }, { 0, NULL } }; @@ -1885,8 +1890,9 @@ bge_chipinit(struct bge_softc *sc) * a status tag update and leave interrupts permanently * disabled. */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5717 && - sc->bge_asicrev != BGE_ASICREV_BCM57765) + if (!BGE_IS_57765_PLUS(sc) && + sc->bge_asicrev != BGE_ASICREV_BCM5717 && + sc->bge_asicrev != BGE_ASICREV_BCM5762) dma_rw_ctl |= BGE_PCIDMARWCTL_TAGGED_STATUS_WA; } pci_write_config(sc->bge_dev, BGE_PCI_DMA_RW_CTL, dma_rw_ctl, 4); @@ -1895,7 +1901,8 @@ bge_chipinit(struct bge_softc *sc) * Set up general mode register. */ mode_ctl = bge_dma_swap_options(sc); - if (sc->bge_asicrev == BGE_ASICREV_BCM5720) { + if (sc->bge_asicrev == BGE_ASICREV_BCM5720 || + sc->bge_asicrev == BGE_ASICREV_BCM5762) { /* Retain Host-2-BMC settings written by APE firmware. */ mode_ctl |= CSR_READ_4(sc, BGE_MODE_CTL) & (BGE_MODECTL_BYTESWAP_B2HRX_DATA | @@ -1953,7 +1960,7 @@ bge_blockinit(struct bge_softc *sc) struct bge_rcb *rcb; bus_size_t vrcb; bge_hostaddr taddr; - uint32_t dmactl, val; + uint32_t dmactl, rdmareg, val; int i, limit; /* @@ -2224,6 +2231,11 @@ bge_blockinit(struct bge_softc *sc) if (!BGE_IS_5705_PLUS(sc)) /* 5700 to 5704 had 16 send rings. */ limit = BGE_TX_RINGS_EXTSSRAM_MAX; + else if (BGE_IS_57765_PLUS(sc) || + sc->bge_asicrev == BGE_ASICREV_BCM5762) + limit = 2; + else if (BGE_IS_5717_PLUS(sc)) + limit = 4; else limit = 1; vrcb = BGE_MEMWIN_START + BGE_SEND_RING_RCB; @@ -2262,6 +2274,7 @@ bge_blockinit(struct bge_softc *sc) } else if (!BGE_IS_5705_PLUS(sc)) limit = BGE_RX_RINGS_MAX; else if (sc->bge_asicrev == BGE_ASICREV_BCM5755 || + sc->bge_asicrev == BGE_ASICREV_BCM5762 || BGE_IS_57765_PLUS(sc)) limit = 4; else @@ -2301,7 +2314,8 @@ bge_blockinit(struct bge_softc *sc) /* Set inter-packet gap */ val = 0x2620; - if (sc->bge_asicrev == BGE_ASICREV_BCM5720) + if (sc->bge_asicrev == BGE_ASICREV_BCM5720 || + sc->bge_asicrev == BGE_ASICREV_BCM5762) val |= CSR_READ_4(sc, BGE_TX_LENGTHS) & (BGE_TXLEN_JMB_FRM_LEN_MSK | BGE_TXLEN_CNT_DN_VAL_MSK); CSR_WRITE_4(sc, BGE_TX_LENGTHS, val); @@ -2465,7 +2479,8 @@ bge_blockinit(struct bge_softc *sc) val |= BGE_RDMAMODE_TSO6_ENABLE; } - if (sc->bge_asicrev == BGE_ASICREV_BCM5720) { + if (sc->bge_asicrev == BGE_ASICREV_BCM5720 || + sc->bge_asicrev == BGE_ASICREV_BCM5762) { val |= CSR_READ_4(sc, BGE_RDMA_MODE) & BGE_RDMAMODE_H2BNC_VLAN_DET; /* @@ -2479,14 +2494,18 @@ bge_blockinit(struct bge_softc *sc) sc->bge_asicrev == BGE_ASICREV_BCM5784 || sc->bge_asicrev == BGE_ASICREV_BCM5785 || sc->bge_asicrev == BGE_ASICREV_BCM57780 || - BGE_IS_5717_PLUS(sc)) { - dmactl = CSR_READ_4(sc, BGE_RDMA_RSRVCTRL); + BGE_IS_5717_PLUS(sc) || BGE_IS_57765_PLUS(sc)) { + if (sc->bge_asicrev == BGE_ASICREV_BCM5762) + rdmareg = BGE_RDMA_RSRVCTRL_REG2; + else + rdmareg = BGE_RDMA_RSRVCTRL; + dmactl = CSR_READ_4(sc, rdmareg); /* * Adjust tx margin to prevent TX data corruption and * fix internal FIFO overflow. */ - if (sc->bge_asicrev == BGE_ASICREV_BCM5719 && - sc->bge_chipid == BGE_CHIPID_BCM5719_A0) { + if (sc->bge_chipid == BGE_CHIPID_BCM5719_A0 || + sc->bge_asicrev == BGE_ASICREV_BCM5762) { dmactl &= ~(BGE_RDMA_RSRVCTRL_FIFO_LWM_MASK | BGE_RDMA_RSRVCTRL_FIFO_HWM_MASK | BGE_RDMA_RSRVCTRL_TXMRGN_MASK); @@ -2499,7 +2518,7 @@ bge_blockinit(struct bge_softc *sc) * The fix is to limit the number of RX BDs * the hardware would fetch at a fime. */ - CSR_WRITE_4(sc, BGE_RDMA_RSRVCTRL, dmactl | + CSR_WRITE_4(sc, rdmareg, dmactl | BGE_RDMA_RSRVCTRL_FIFO_OFLW_FIX); } @@ -2517,6 +2536,11 @@ bge_blockinit(struct bge_softc *sc) CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL) | BGE_RDMA_LSO_CRPTEN_CTRL_BLEN_BD_512 | BGE_RDMA_LSO_CRPTEN_CTRL_BLEN_LSO_4K); + } else if (sc->bge_asicrev == BGE_ASICREV_BCM5762) { + CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL_REG2, + CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL_REG2) | + BGE_RDMA_LSO_CRPTEN_CTRL_BLEN_BD_4K | + BGE_RDMA_LSO_CRPTEN_CTRL_BLEN_LSO_4K); } CSR_WRITE_4(sc, BGE_RDMA_MODE, val); @@ -2666,6 +2690,9 @@ bge_chipid(device_t dev) case BCOM_DEVICEID_BCM5718: case BCOM_DEVICEID_BCM5719: case BCOM_DEVICEID_BCM5720: + case BCOM_DEVICEID_BCM5725: + case BCOM_DEVICEID_BCM5727: + case BCOM_DEVICEID_BCM5762: id = pci_read_config(dev, BGE_PCI_GEN2_PRODID_ASICREV, 4); break; @@ -3341,6 +3368,7 @@ bge_attach(device_t dev) /* Save chipset family. */ switch (sc->bge_asicrev) { + case BGE_ASICREV_BCM5762: case BGE_ASICREV_BCM57765: case BGE_ASICREV_BCM57766: sc->bge_flags |= BGE_FLAG_57765_PLUS; @@ -3401,6 +3429,7 @@ bge_attach(device_t dev) case BGE_ASICREV_BCM5719: case BGE_ASICREV_BCM5720: case BGE_ASICREV_BCM5761: + case BGE_ASICREV_BCM5762: sc->bge_flags |= BGE_FLAG_APE; break; } @@ -5465,7 +5494,8 @@ bge_init_locked(struct bge_softc *sc) mode = CSR_READ_4(sc, BGE_TX_MODE); if (BGE_IS_5755_PLUS(sc) || sc->bge_asicrev == BGE_ASICREV_BCM5906) mode |= BGE_TXMODE_MBUF_LOCKUP_FIX; - if (sc->bge_asicrev == BGE_ASICREV_BCM5720) { + if (sc->bge_asicrev == BGE_ASICREV_BCM5720 || + sc->bge_asicrev == BGE_ASICREV_BCM5762) { mode &= ~(BGE_TXMODE_JMB_FRM_LEN | BGE_TXMODE_CNT_DN_MODE); mode |= CSR_READ_4(sc, BGE_TX_MODE) & (BGE_TXMODE_JMB_FRM_LEN | BGE_TXMODE_CNT_DN_MODE); Modified: head/sys/dev/bge/if_bgereg.h ============================================================================== --- head/sys/dev/bge/if_bgereg.h Sat Jul 20 07:29:19 2013 (r253482) +++ head/sys/dev/bge/if_bgereg.h Sat Jul 20 07:58:03 2013 (r253483) @@ -331,6 +331,7 @@ #define BGE_CHIPID_BCM5717_B0 0x05717100 #define BGE_CHIPID_BCM5719_A0 0x05719000 #define BGE_CHIPID_BCM5720_A0 0x05720000 +#define BGE_CHIPID_BCM5762_A0 0x05762000 #define BGE_CHIPID_BCM57765_A0 0x57785000 #define BGE_CHIPID_BCM57765_B0 0x57785100 @@ -357,6 +358,7 @@ #define BGE_ASICREV_BCM5719 0x5719 #define BGE_ASICREV_BCM5720 0x5720 #define BGE_ASICREV_BCM5761 0x5761 +#define BGE_ASICREV_BCM5762 0x5762 #define BGE_ASICREV_BCM5784 0x5784 #define BGE_ASICREV_BCM5785 0x5785 #define BGE_ASICREV_BCM57765 0x57785 @@ -1544,6 +1546,8 @@ */ #define BGE_RDMA_MODE 0x4800 #define BGE_RDMA_STATUS 0x4804 +#define BGE_RDMA_RSRVCTRL_REG2 0x4890 +#define BGE_RDMA_LSO_CRPTEN_CTRL_REG2 0x48A0 #define BGE_RDMA_RSRVCTRL 0x4900 #define BGE_RDMA_LSO_CRPTEN_CTRL 0x4910 @@ -2454,6 +2458,8 @@ struct bge_status_block { #define BCOM_DEVICEID_BCM5721 0x1659 #define BCOM_DEVICEID_BCM5722 0x165A #define BCOM_DEVICEID_BCM5723 0x165B +#define BCOM_DEVICEID_BCM5725 0x1643 +#define BCOM_DEVICEID_BCM5727 0x16F3 #define BCOM_DEVICEID_BCM5750 0x1676 #define BCOM_DEVICEID_BCM5750M 0x167C #define BCOM_DEVICEID_BCM5751 0x1677 @@ -2473,6 +2479,7 @@ struct bge_status_block { #define BCOM_DEVICEID_BCM5761E 0x1680 #define BCOM_DEVICEID_BCM5761S 0x1688 #define BCOM_DEVICEID_BCM5761SE 0x1689 +#define BCOM_DEVICEID_BCM5762 0x1687 #define BCOM_DEVICEID_BCM5764 0x1684 #define BCOM_DEVICEID_BCM5780 0x166A #define BCOM_DEVICEID_BCM5780S 0x166B