From owner-svn-src-head@freebsd.org Mon Dec 31 16:01:23 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 072CA1438AA7; Mon, 31 Dec 2018 16:01:23 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id A0CB471B11; Mon, 31 Dec 2018 16:01:22 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 947C3CCE7; Mon, 31 Dec 2018 16:01:22 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id wBVG1Mfh024423; Mon, 31 Dec 2018 16:01:22 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id wBVG1MKi024422; Mon, 31 Dec 2018 16:01:22 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201812311601.wBVG1MKi024422@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Mon, 31 Dec 2018 16:01:22 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r342652 - head/sys/arm/ti X-SVN-Group: head X-SVN-Commit-Author: ian X-SVN-Commit-Paths: head/sys/arm/ti X-SVN-Commit-Revision: 342652 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: A0CB471B11 X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.98 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_MEDIUM(-1.00)[-0.999,0]; NEURAL_HAM_SHORT(-0.98)[-0.980,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US]; NEURAL_HAM_LONG(-1.00)[-0.998,0] X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 31 Dec 2018 16:01:23 -0000 Author: ian Date: Mon Dec 31 16:01:22 2018 New Revision: 342652 URL: https://svnweb.freebsd.org/changeset/base/342652 Log: Support the SPI mode and bus clock frequency parameters set by the devices requesting SPI transfers. Reported by: SAITOU Toshihide Modified: head/sys/arm/ti/ti_spi.c Modified: head/sys/arm/ti/ti_spi.c ============================================================================== --- head/sys/arm/ti/ti_spi.c Mon Dec 31 15:43:06 2018 (r342651) +++ head/sys/arm/ti/ti_spi.c Mon Dec 31 16:01:22 2018 (r342652) @@ -446,7 +446,7 @@ ti_spi_transfer(device_t dev, device_t child, struct s { int err; struct ti_spi_softc *sc; - uint32_t reg, cs; + uint32_t clockhz, cs, mode, reg; sc = device_get_softc(dev); @@ -457,6 +457,8 @@ ti_spi_transfer(device_t dev, device_t child, struct s /* Get the proper chip select for this child. */ spibus_get_cs(child, &cs); + spibus_get_clock(child, &clockhz); + spibus_get_mode(child, &mode); cs &= ~SPIBUS_CS_HIGH; @@ -466,6 +468,13 @@ ti_spi_transfer(device_t dev, device_t child, struct s return (EINVAL); } + if (mode > 3) + { + device_printf(dev, "Invalid mode %d requested by %s\n", mode, + device_get_nameunit(child)); + return (EINVAL); + } + TI_SPI_LOCK(sc); /* If the controller is in use wait until it is available. */ @@ -487,8 +496,8 @@ ti_spi_transfer(device_t dev, device_t child, struct s /* Disable FIFO for now. */ sc->sc_fifolvl = 1; - /* Use a safe clock - 500kHz. */ - ti_spi_set_clock(sc, sc->sc_cs, 500000); + /* Set the bus frequency. */ + ti_spi_set_clock(sc, sc->sc_cs, clockhz); /* Disable the FIFO. */ TI_SPI_WRITE(sc, MCSPI_XFERLEVEL, 0); @@ -500,6 +509,7 @@ ti_spi_transfer(device_t dev, device_t child, struct s MCSPI_CONF_DPE1 | MCSPI_CONF_DPE0 | MCSPI_CONF_DMAR | MCSPI_CONF_DMAW | MCSPI_CONF_EPOL); reg |= MCSPI_CONF_DPE0 | MCSPI_CONF_EPOL | MCSPI_CONF_WL8BITS; + reg |= mode; /* POL and PHA are the low bits, we can just OR-in mode */ TI_SPI_WRITE(sc, MCSPI_CONF_CH(sc->sc_cs), reg); #if 0