Date: Fri, 15 Jun 2018 08:36:21 +0000 (UTC) From: Emmanuel Vadot <manu@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r335190 - head/sys/arm/allwinner/clkng Message-ID: <201806150836.w5F8aLTb067264@repo.freebsd.org>
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Author: manu Date: Fri Jun 15 08:36:21 2018 New Revision: 335190 URL: https://svnweb.freebsd.org/changeset/base/335190 Log: allwinner: ccung: Fully subclass the clock drivers Each clock drivers if now fully subclassed, this have the advantage that we can control the probe order. Some clocks can have parents from other drivers, for example clocks in the sun8i_r driver uses clocks from the main clock driver. This worked before because the sun8i_r node is after the main ccu node in the dtb and driver are probed in DTB order. This cannot work with the Display Engine clocks as it is the first node in the DTB. Tested on: A83T, H5 A64 Tested on: A20 (kevans) Deleted: head/sys/arm/allwinner/clkng/ccu_a10.h head/sys/arm/allwinner/clkng/ccu_a13.h head/sys/arm/allwinner/clkng/ccu_a31.h head/sys/arm/allwinner/clkng/ccu_a64.h head/sys/arm/allwinner/clkng/ccu_a83t.h head/sys/arm/allwinner/clkng/ccu_h3.h head/sys/arm/allwinner/clkng/ccu_sun8i_r.h Modified: head/sys/arm/allwinner/clkng/aw_ccung.c head/sys/arm/allwinner/clkng/aw_ccung.h head/sys/arm/allwinner/clkng/ccu_a10.c head/sys/arm/allwinner/clkng/ccu_a13.c head/sys/arm/allwinner/clkng/ccu_a31.c head/sys/arm/allwinner/clkng/ccu_a64.c head/sys/arm/allwinner/clkng/ccu_a83t.c head/sys/arm/allwinner/clkng/ccu_h3.c head/sys/arm/allwinner/clkng/ccu_sun8i_r.c Modified: head/sys/arm/allwinner/clkng/aw_ccung.c ============================================================================== --- head/sys/arm/allwinner/clkng/aw_ccung.c Fri Jun 15 06:03:40 2018 (r335189) +++ head/sys/arm/allwinner/clkng/aw_ccung.c Fri Jun 15 08:36:21 2018 (r335190) @@ -1,7 +1,8 @@ /*- - * Copyright (c) 2017 Emmanuel Vadot <manu@freebsd.org> - * All rights reserved. + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * + * Copyright (c) 2017,2018 Emmanuel Vadot <manu@freebsd.org> + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -58,33 +59,6 @@ __FBSDID("$FreeBSD$"); #include "opt_soc.h" #endif -#if defined(SOC_ALLWINNER_A10) || defined(SOC_ALLWINNER_A20) -#include <arm/allwinner/clkng/ccu_a10.h> -#endif - -#if defined(SOC_ALLWINNER_A13) -#include <arm/allwinner/clkng/ccu_a13.h> -#endif - -#if defined(SOC_ALLWINNER_A31) -#include <arm/allwinner/clkng/ccu_a31.h> -#endif - -#if defined(SOC_ALLWINNER_A64) -#include <arm/allwinner/clkng/ccu_a64.h> -#include <arm/allwinner/clkng/ccu_sun8i_r.h> -#endif - -#if defined(SOC_ALLWINNER_H3) || defined(SOC_ALLWINNER_H5) -#include <arm/allwinner/clkng/ccu_h3.h> -#include <arm/allwinner/clkng/ccu_sun8i_r.h> -#endif - -#if defined(SOC_ALLWINNER_A83T) -#include <arm/allwinner/clkng/ccu_a83t.h> -#include <arm/allwinner/clkng/ccu_sun8i_r.h> -#endif - #include "clkdev_if.h" #include "hwreset_if.h" @@ -93,35 +67,6 @@ static struct resource_spec aw_ccung_spec[] = { { -1, 0 } }; -static struct ofw_compat_data compat_data[] = { -#if defined(SOC_ALLWINNER_A10) - { "allwinner,sun4i-a10-ccu", A10_CCU }, -#endif -#if defined(SOC_ALLWINNER_A31) - { "allwinner,sun5i-a13-ccu", A13_CCU}, -#endif -#if defined(SOC_ALLWINNER_A20) - { "allwinner,sun7i-a20-ccu", A20_CCU }, -#endif -#if defined(SOC_ALLWINNER_H3) || defined(SOC_ALLWINNER_H5) - { "allwinner,sun8i-h3-ccu", H3_CCU }, - { "allwinner,sun50i-h5-ccu", H3_CCU }, - { "allwinner,sun8i-h3-r-ccu", H3_R_CCU }, -#endif -#if defined(SOC_ALLWINNER_A31) - { "allwinner,sun6i-a31-ccu", A31_CCU }, -#endif -#if defined(SOC_ALLWINNER_A64) - { "allwinner,sun50i-a64-ccu", A64_CCU }, - { "allwinner,sun50i-a64-r-ccu", A64_R_CCU }, -#endif -#if defined(SOC_ALLWINNER_A83T) - { "allwinner,sun8i-a83t-ccu", A83T_CCU }, - { "allwinner,sun8i-a83t-r-ccu", A83T_R_CCU }, -#endif - {NULL, 0 } -}; - #define CCU_READ4(sc, reg) bus_read_4((sc)->res, (reg)) #define CCU_WRITE4(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) @@ -223,20 +168,6 @@ aw_ccung_device_unlock(device_t dev) } static int -aw_ccung_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "Allwinner Clock Control Unit NG"); - return (BUS_PROBE_DEFAULT); -} - -static int aw_ccung_register_gates(struct aw_ccung_softc *sc) { struct clk_gate_def def; @@ -313,10 +244,11 @@ aw_ccung_init_clocks(struct aw_ccung_softc *sc) } } -static int +int aw_ccung_attach(device_t dev) { struct aw_ccung_softc *sc; + int i; sc = device_get_softc(dev); sc->dev = dev; @@ -328,57 +260,35 @@ aw_ccung_attach(device_t dev) mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); - sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; - sc->clkdom = clkdom_create(dev); if (sc->clkdom == NULL) panic("Cannot create clkdom\n"); - switch (sc->type) { -#if defined(SOC_ALLWINNER_A10) - case A10_CCU: - ccu_a10_register_clocks(sc); - break; -#endif -#if defined(SOC_ALLWINNER_A13) - case A13_CCU: - ccu_a13_register_clocks(sc); - break; -#endif -#if defined(SOC_ALLWINNER_A20) - case A20_CCU: - ccu_a20_register_clocks(sc); - break; -#endif -#if defined(SOC_ALLWINNER_H3) || defined(SOC_ALLWINNER_H5) - case H3_CCU: - ccu_h3_register_clocks(sc); - break; - case H3_R_CCU: - ccu_sun8i_r_register_clocks(sc); - break; -#endif -#if defined(SOC_ALLWINNER_A31) - case A31_CCU: - ccu_a31_register_clocks(sc); - break; -#endif -#if defined(SOC_ALLWINNER_A64) - case A64_CCU: - ccu_a64_register_clocks(sc); - break; - case A64_R_CCU: - ccu_sun8i_r_register_clocks(sc); - break; -#endif -#if defined(SOC_ALLWINNER_A83T) - case A83T_CCU: - ccu_a83t_register_clocks(sc); - break; - case A83T_R_CCU: - ccu_sun8i_r_register_clocks(sc); - break; -#endif + for (i = 0; i < sc->nclks; i++) { + switch (sc->clks[i].type) { + case AW_CLK_UNDEFINED: + break; + case AW_CLK_MUX: + clknode_mux_register(sc->clkdom, sc->clks[i].clk.mux); + break; + case AW_CLK_DIV: + clknode_div_register(sc->clkdom, sc->clks[i].clk.div); + break; + case AW_CLK_FIXED: + clknode_fixed_register(sc->clkdom, + sc->clks[i].clk.fixed); + break; + case AW_CLK_NKMP: + aw_clk_nkmp_register(sc->clkdom, sc->clks[i].clk.nkmp); + break; + case AW_CLK_NM: + aw_clk_nm_register(sc->clkdom, sc->clks[i].clk.nm); + break; + case AW_CLK_PREDIV_MUX: + aw_clk_prediv_mux_register(sc->clkdom, + sc->clks[i].clk.prediv_mux); + break; + } } if (sc->gates) @@ -401,10 +311,6 @@ aw_ccung_attach(device_t dev) } static device_method_t aw_ccung_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, aw_ccung_probe), - DEVMETHOD(device_attach, aw_ccung_attach), - /* clkdev interface */ DEVMETHOD(clkdev_write_4, aw_ccung_write_4), DEVMETHOD(clkdev_read_4, aw_ccung_read_4), @@ -419,14 +325,5 @@ static device_method_t aw_ccung_methods[] = { DEVMETHOD_END }; -static driver_t aw_ccung_driver = { - "aw_ccung", - aw_ccung_methods, - sizeof(struct aw_ccung_softc), -}; - -static devclass_t aw_ccung_devclass; - -EARLY_DRIVER_MODULE(aw_ccung, simplebus, aw_ccung_driver, aw_ccung_devclass, - 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); -MODULE_VERSION(aw_ccung, 1); +DEFINE_CLASS_0(aw_ccung, aw_ccung_driver, aw_ccung_methods, + sizeof(struct aw_ccung_softc)); Modified: head/sys/arm/allwinner/clkng/aw_ccung.h ============================================================================== --- head/sys/arm/allwinner/clkng/aw_ccung.h Fri Jun 15 06:03:40 2018 (r335189) +++ head/sys/arm/allwinner/clkng/aw_ccung.h Fri Jun 15 08:36:21 2018 (r335190) @@ -1,7 +1,8 @@ /*- - * Copyright (c) 2017 Emmanuel Vadot <manu@freebsd.org> - * All rights reserved. + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * + * Copyright (c) 2017,2018 Emmanuel Vadot <manu@freebsd.org> + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -29,29 +30,47 @@ #ifndef __CCU_NG_H__ #define __CCU_NG_H__ -enum aw_ccung_type { - H3_CCU = 1, - H3_R_CCU, - A31_CCU, - A64_CCU, - A64_R_CCU, - A13_CCU, - A83T_CCU, - A83T_R_CCU, - A10_CCU, - A20_CCU, +#include <arm/allwinner/clkng/aw_clk.h> +#include <arm/allwinner/clkng/aw_clk_nkmp.h> +#include <arm/allwinner/clkng/aw_clk_nm.h> +#include <arm/allwinner/clkng/aw_clk_prediv_mux.h> +#include <dev/extres/clk/clk_mux.h> +#include <dev/extres/clk/clk_div.h> +#include <dev/extres/clk/clk_fixed.h> + +enum aw_ccung_clk_type { + AW_CLK_UNDEFINED = 0, + AW_CLK_MUX, + AW_CLK_DIV, + AW_CLK_FIXED, + AW_CLK_NKMP, + AW_CLK_NM, + AW_CLK_PREDIV_MUX, }; +struct aw_ccung_clk { + enum aw_ccung_clk_type type; + union { + struct clk_mux_def *mux; + struct clk_div_def *div; + struct clk_fixed_def *fixed; + struct aw_clk_nkmp_def *nkmp; + struct aw_clk_nm_def *nm; + struct aw_clk_prediv_mux_def *prediv_mux; + } clk; +}; + struct aw_ccung_softc { device_t dev; struct resource *res; struct clkdom *clkdom; struct mtx mtx; - int type; struct aw_ccung_reset *resets; int nresets; struct aw_ccung_gate *gates; int ngates; + struct aw_ccung_clk *clks; + int nclks; struct aw_clk_init *clk_init; int n_clk_init; }; @@ -68,5 +87,9 @@ struct aw_ccung_gate { uint32_t offset; uint32_t shift; }; + +DECLARE_CLASS(aw_ccung_driver); + +int aw_ccung_attach(device_t dev); #endif /* __CCU_NG_H__ */ Modified: head/sys/arm/allwinner/clkng/ccu_a10.c ============================================================================== --- head/sys/arm/allwinner/clkng/ccu_a10.c Fri Jun 15 06:03:40 2018 (r335189) +++ head/sys/arm/allwinner/clkng/ccu_a10.c Fri Jun 15 08:36:21 2018 (r335190) @@ -33,23 +33,26 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> #include <sys/systm.h> #include <sys/bus.h> +#include <sys/rman.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <machine/bus.h> +#include <dev/fdt/simplebus.h> + +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> + #include <dev/extres/clk/clk_div.h> #include <dev/extres/clk/clk_fixed.h> #include <dev/extres/clk/clk_mux.h> #include <arm/allwinner/clkng/aw_ccung.h> -#include <arm/allwinner/clkng/aw_clk.h> -#include <arm/allwinner/clkng/aw_clk_nm.h> -#include <arm/allwinner/clkng/aw_clk_nkmp.h> -#include <arm/allwinner/clkng/aw_clk_prediv_mux.h> #include <gnu/dts/include/dt-bindings/clock/sun4i-a10-ccu.h> #include <gnu/dts/include/dt-bindings/clock/sun7i-a20-ccu.h> #include <gnu/dts/include/dt-bindings/reset/sun4i-a10-ccu.h> -#include "ccu_a10.h" - /* Non-exported resets */ /* Non-exported clocks */ #define CLK_PLL_CORE 2 @@ -524,89 +527,98 @@ NM_CLK(spi3_clk, /* MISSING CLK_I2S1, CLK_I2S2, DE Clocks */ -static struct aw_clk_nkmp_def *nkmp_clks[] = { - &pll_core_clk, - &pll_ddr_other_clk, - &pll_ddr_clk, - &pll6_clk, - &pll_periph_sata_clk, +static struct aw_ccung_clk a10_ccu_clks[] = { + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_core_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr_other_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll6_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph_sata_clk}, + { .type = AW_CLK_NM, .clk.nm = &axi_clk}, + { .type = AW_CLK_NM, .clk.nm = &ahb_clk}, + { .type = AW_CLK_NM, .clk.nm = &apb0_clk}, + { .type = AW_CLK_NM, .clk.nm = &apb1_clk}, + { .type = AW_CLK_NM, .clk.nm = &pll_video0_clk}, + { .type = AW_CLK_NM, .clk.nm = &pll_video1_clk}, + { .type = AW_CLK_NM, .clk.nm = &nand_clk}, + { .type = AW_CLK_NM, .clk.nm = &ms_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc0_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc1_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc2_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc3_clk}, + { .type = AW_CLK_NM, .clk.nm = &ts_clk}, + { .type = AW_CLK_NM, .clk.nm = &ss_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi0_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi1_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi2_clk}, + { .type = AW_CLK_NM, .clk.nm = &ir0_clk}, + { .type = AW_CLK_NM, .clk.nm = &ir1_clk}, + { .type = AW_CLK_NM, .clk.nm = &keypad_clk}, + { .type = AW_CLK_NM, .clk.nm = &sata_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi3_clk}, + { .type = AW_CLK_MUX, .clk.mux = &cpu_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_periph_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_video0_2x_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_video1_2x_clk}, }; -static struct aw_clk_nm_def *nm_clks[] = { - &axi_clk, - &ahb_clk, - &apb0_clk, - &apb1_clk, - &pll_video0_clk, - &pll_video1_clk, - &nand_clk, - &ms_clk, - &mmc0_clk, - &mmc1_clk, - &mmc2_clk, - &mmc3_clk, - &ts_clk, - &ss_clk, - &spi0_clk, - &spi1_clk, - &spi2_clk, - &ir0_clk, - &ir1_clk, - &keypad_clk, - &sata_clk, - &spi3_clk, +static struct aw_clk_init a10_init_clks[] = { }; -static struct aw_clk_prediv_mux_def *prediv_mux_clks[] = { +static struct ofw_compat_data compat_data[] = { +#if defined(SOC_ALLWINNER_A10) + { "allwinner,sun4i-a10-ccu", 1 }, +#endif +#if defined(SOC_ALLWINNER_A20) + { "allwinner,sun7i-a20-ccu", 1 }, +#endif + { NULL, 0}, }; -static struct clk_mux_def *mux_clks[] = { - &cpu_clk, -}; +static int +ccu_a10_probe(device_t dev) +{ -static struct clk_div_def *div_clks[] = { -}; + if (!ofw_bus_status_okay(dev)) + return (ENXIO); -static struct clk_fixed_def *fixed_factor_clks[] = { - &pll_periph_clk, - &pll_video0_2x_clk, - &pll_video1_2x_clk, -}; + if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) + return (ENXIO); -static struct aw_clk_init init_clks[] = { -}; + device_set_desc(dev, "Allwinner A10/A20 Clock Control Unit NG"); + return (BUS_PROBE_DEFAULT); +} -void -ccu_a10_register_clocks(struct aw_ccung_softc *sc) +static int +ccu_a10_attach(device_t dev) { - int i; + struct aw_ccung_softc *sc; + sc = device_get_softc(dev); + sc->resets = a10_ccu_resets; sc->nresets = nitems(a10_ccu_resets); sc->gates = a10_ccu_gates; sc->ngates = nitems(a10_ccu_gates); - sc->clk_init = init_clks; - sc->n_clk_init = nitems(init_clks); + sc->clks = a10_ccu_clks; + sc->nclks = nitems(a10_ccu_clks); + sc->clk_init = a10_init_clks; + sc->n_clk_init = nitems(a10_init_clks); - for (i = 0; i < nitems(nkmp_clks); i++) - aw_clk_nkmp_register(sc->clkdom, nkmp_clks[i]); - for (i = 0; i < nitems(nm_clks); i++) - aw_clk_nm_register(sc->clkdom, nm_clks[i]); - for (i = 0; i < nitems(prediv_mux_clks); i++) - aw_clk_prediv_mux_register(sc->clkdom, prediv_mux_clks[i]); - - for (i = 0; i < nitems(mux_clks); i++) - clknode_mux_register(sc->clkdom, mux_clks[i]); - for (i = 0; i < nitems(div_clks); i++) - clknode_div_register(sc->clkdom, div_clks[i]); - for (i = 0; i < nitems(fixed_factor_clks); i++) - clknode_fixed_register(sc->clkdom, fixed_factor_clks[i]); + return (aw_ccung_attach(dev)); } -void -ccu_a20_register_clocks(struct aw_ccung_softc *sc) -{ +static device_method_t ccu_a10ng_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, ccu_a10_probe), + DEVMETHOD(device_attach, ccu_a10_attach), - /* XXX TODO: Implement the A20-specific clocks */ - ccu_a10_register_clocks(sc); -} + DEVMETHOD_END +}; + +static devclass_t ccu_a10ng_devclass; + +DEFINE_CLASS_1(ccu_a10ng, ccu_a10ng_driver, ccu_a10ng_methods, + sizeof(struct aw_ccung_softc), aw_ccung_driver); + +EARLY_DRIVER_MODULE(ccu_a10ng, simplebus, ccu_a10ng_driver, + ccu_a10ng_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); Modified: head/sys/arm/allwinner/clkng/ccu_a13.c ============================================================================== --- head/sys/arm/allwinner/clkng/ccu_a13.c Fri Jun 15 06:03:40 2018 (r335189) +++ head/sys/arm/allwinner/clkng/ccu_a13.c Fri Jun 15 08:36:21 2018 (r335190) @@ -1,7 +1,8 @@ /*- - * Copyright (c) 2017 Emmanuel Vadot <manu@freebsd.org> - * All rights reserved. + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * + * Copyright (c) 2017,2018 Emmanuel Vadot <manu@freebsd.org> + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -32,22 +33,25 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> #include <sys/systm.h> #include <sys/bus.h> +#include <sys/rman.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <machine/bus.h> +#include <dev/fdt/simplebus.h> + +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> + #include <dev/extres/clk/clk_div.h> #include <dev/extres/clk/clk_fixed.h> #include <dev/extres/clk/clk_mux.h> #include <arm/allwinner/clkng/aw_ccung.h> -#include <arm/allwinner/clkng/aw_clk.h> -#include <arm/allwinner/clkng/aw_clk_nm.h> -#include <arm/allwinner/clkng/aw_clk_nkmp.h> -#include <arm/allwinner/clkng/aw_clk_prediv_mux.h> #include <dt-bindings/clock/sun5i-ccu.h> #include <dt-bindings/reset/sun5i-ccu.h> -#include "ccu_a13.h" - /* Non-exported clocks */ #define CLK_PLL_CORE 2 @@ -496,71 +500,72 @@ static struct aw_clk_nm_def ir_clk = { /* Clocks list */ - -static struct aw_clk_nkmp_def *nkmp_clks[] = { - &pll_core, - &pll_audio, - &pll_ddr_base, - &pll_periph, +static struct aw_ccung_clk a13_ccu_clks[] = { + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_core}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_audio}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr_base}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph}, + { .type = AW_CLK_NM, .clk.nm = &apb1_clk}, + { .type = AW_CLK_NM, .clk.nm = &nand_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc0_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc1_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc2_clk}, + { .type = AW_CLK_NM, .clk.nm = &ss_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi0_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi1_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi2_clk}, + { .type = AW_CLK_NM, .clk.nm = &ir_clk}, + { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &cpu_clk}, + { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &ahb_clk}, + { .type = AW_CLK_DIV, .clk.div = &pll_ddr}, + { .type = AW_CLK_DIV, .clk.div = &pll_ddr_other}, + { .type = AW_CLK_DIV, .clk.div = &axi_clk}, + { .type = AW_CLK_DIV, .clk.div = &apb0_clk}, }; -static struct aw_clk_nm_def *nm_clks[] = { - &apb1_clk, - &nand_clk, - &mmc0_clk, - &mmc1_clk, - &mmc2_clk, - &ss_clk, - &spi0_clk, - &spi1_clk, - &spi2_clk, - &ir_clk, -}; +static int +ccu_a13_probe(device_t dev) +{ -static struct aw_clk_prediv_mux_def *prediv_mux_clks[] = { - &cpu_clk, - &ahb_clk, -}; + if (!ofw_bus_status_okay(dev)) + return (ENXIO); -static struct clk_div_def *div_clks[] = { - &pll_ddr, - &pll_ddr_other, - &axi_clk, - &apb0_clk, -}; + if (!ofw_bus_is_compatible(dev, "allwinner,sun5i-a13-ccu")) + return (ENXIO); -static struct clk_mux_def *mux_clks[] = { -}; + device_set_desc(dev, "Allwinner A13 Clock Control Unit NG"); + return (BUS_PROBE_DEFAULT); +} -static struct clk_fixed_def *fixed_factor_clks[] = { -}; - -static struct aw_clk_init init_clks[] = { -}; - -void -ccu_a13_register_clocks(struct aw_ccung_softc *sc) +static int +ccu_a13_attach(device_t dev) { - int i; + struct aw_ccung_softc *sc; + sc = device_get_softc(dev); + sc->resets = a13_ccu_resets; sc->nresets = nitems(a13_ccu_resets); sc->gates = a13_ccu_gates; sc->ngates = nitems(a13_ccu_gates); - sc->clk_init = init_clks; - sc->n_clk_init = nitems(init_clks); + sc->clks = a13_ccu_clks; + sc->nclks = nitems(a13_ccu_clks); - for (i = 0; i < nitems(nkmp_clks); i++) - aw_clk_nkmp_register(sc->clkdom, nkmp_clks[i]); - for (i = 0; i < nitems(nm_clks); i++) - aw_clk_nm_register(sc->clkdom, nm_clks[i]); - for (i = 0; i < nitems(prediv_mux_clks); i++) - aw_clk_prediv_mux_register(sc->clkdom, prediv_mux_clks[i]); - - for (i = 0; i < nitems(mux_clks); i++) - clknode_mux_register(sc->clkdom, mux_clks[i]); - for (i = 0; i < nitems(div_clks); i++) - clknode_div_register(sc->clkdom, div_clks[i]); - for (i = 0; i < nitems(fixed_factor_clks); i++) - clknode_fixed_register(sc->clkdom, fixed_factor_clks[i]); + return (aw_ccung_attach(dev)); } + +static device_method_t ccu_a13ng_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, ccu_a13_probe), + DEVMETHOD(device_attach, ccu_a13_attach), + + DEVMETHOD_END +}; + +static devclass_t ccu_a13ng_devclass; + +DEFINE_CLASS_1(ccu_a13ng, ccu_a13ng_driver, ccu_a13ng_methods, + sizeof(struct aw_ccung_softc), aw_ccung_driver); + +EARLY_DRIVER_MODULE(ccu_a13ng, simplebus, ccu_a13ng_driver, + ccu_a13ng_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); Modified: head/sys/arm/allwinner/clkng/ccu_a31.c ============================================================================== --- head/sys/arm/allwinner/clkng/ccu_a31.c Fri Jun 15 06:03:40 2018 (r335189) +++ head/sys/arm/allwinner/clkng/ccu_a31.c Fri Jun 15 08:36:21 2018 (r335190) @@ -1,7 +1,8 @@ /*- - * Copyright (c) 2017 Emmanuel Vadot <manu@freebsd.org> - * All rights reserved. + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * + * Copyright (c) 2017,2018 Emmanuel Vadot <manu@freebsd.org> + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -32,22 +33,25 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> #include <sys/systm.h> #include <sys/bus.h> +#include <sys/rman.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <machine/bus.h> +#include <dev/fdt/simplebus.h> + +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> + #include <dev/extres/clk/clk_div.h> #include <dev/extres/clk/clk_fixed.h> #include <dev/extres/clk/clk_mux.h> #include <arm/allwinner/clkng/aw_ccung.h> -#include <arm/allwinner/clkng/aw_clk.h> -#include <arm/allwinner/clkng/aw_clk_nm.h> -#include <arm/allwinner/clkng/aw_clk_nkmp.h> -#include <arm/allwinner/clkng/aw_clk_prediv_mux.h> #include <dt-bindings/clock/sun6i-a31-ccu.h> #include <dt-bindings/reset/sun6i-a31-ccu.h> -#include "ccu_a31.h" - /* Non-exported clocks */ #define CLK_PLL_CPU 0 #define CLK_PLL_AUDIO_BASE 1 @@ -859,113 +863,114 @@ PREDIV_CLK(gpu_hyd_clk, /* ATS 0x1B0 */ /* Trace 0x1B4 */ - -static struct aw_clk_nkmp_def *nkmp_clks[] = { - &pll_cpu_clk, - &pll_audio_clk, - &pll_periph_clk, - &pll_ddr_clk, - &pll_mipi_clk, +static struct aw_ccung_clk a31_ccu_clks[] = { + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_cpu_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_audio_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_mipi_clk}, + { .type = AW_CLK_NM, .clk.nm = &pll_video0_clk}, + { .type = AW_CLK_NM, .clk.nm = &pll_ve_clk}, + { .type = AW_CLK_NM, .clk.nm = &pll_video1_clk}, + { .type = AW_CLK_NM, .clk.nm = &pll_gpu_clk}, + { .type = AW_CLK_NM, .clk.nm = &pll9_clk}, + { .type = AW_CLK_NM, .clk.nm = &pll10_clk}, + { .type = AW_CLK_NM, .clk.nm = &apb2_clk}, + { .type = AW_CLK_NM, .clk.nm = &nand0_clk}, + { .type = AW_CLK_NM, .clk.nm = &nand1_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc0_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc1_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc2_clk}, + { .type = AW_CLK_NM, .clk.nm = &mmc3_clk}, + { .type = AW_CLK_NM, .clk.nm = &ts_clk}, + { .type = AW_CLK_NM, .clk.nm = &ss_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi0_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi1_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi2_clk}, + { .type = AW_CLK_NM, .clk.nm = &spi3_clk}, + { .type = AW_CLK_NM, .clk.nm = &mdfs_clk}, + { .type = AW_CLK_NM, .clk.nm = &sdram0_clk}, + { .type = AW_CLK_NM, .clk.nm = &sdram1_clk}, + { .type = AW_CLK_NM, .clk.nm = &be0_clk}, + { .type = AW_CLK_NM, .clk.nm = &be1_clk}, + { .type = AW_CLK_NM, .clk.nm = &fe0_clk}, + { .type = AW_CLK_NM, .clk.nm = &fe1_clk}, + { .type = AW_CLK_NM, .clk.nm = &mp_clk}, + { .type = AW_CLK_NM, .clk.nm = &lcd0_ch0_clk}, + { .type = AW_CLK_NM, .clk.nm = &lcd1_ch0_clk}, + { .type = AW_CLK_NM, .clk.nm = &lcd0_ch1_clk}, + { .type = AW_CLK_NM, .clk.nm = &lcd1_ch1_clk}, + { .type = AW_CLK_NM, .clk.nm = &ve_clk}, + { .type = AW_CLK_NM, .clk.nm = &hdmi_clk}, + { .type = AW_CLK_NM, .clk.nm = &mbus0_clk}, + { .type = AW_CLK_NM, .clk.nm = &mbus1_clk}, + { .type = AW_CLK_NM, .clk.nm = &mipi_dsi_clk}, + { .type = AW_CLK_NM, .clk.nm = &mipi_dsi_dphy_clk}, + { .type = AW_CLK_NM, .clk.nm = &mipi_csi_dphy_clk}, + { .type = AW_CLK_NM, .clk.nm = &iep_drc0_clk}, + { .type = AW_CLK_NM, .clk.nm = &iep_drc1_clk}, + { .type = AW_CLK_NM, .clk.nm = &iep_deu0_clk}, + { .type = AW_CLK_NM, .clk.nm = &iep_deu1_clk}, + { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &ahb1_clk}, + { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &gpu_core_clk}, + { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &gpu_memory_clk}, + { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &gpu_hyd_clk}, + { .type = AW_CLK_DIV, .clk.div = &axi_clk}, + { .type = AW_CLK_DIV, .clk.div = &apb1_clk}, + { .type = AW_CLK_MUX, .clk.mux = &cpu_clk}, + { .type = AW_CLK_MUX, .clk.mux = &daudio0mux_clk}, + { .type = AW_CLK_MUX, .clk.mux = &daudio1mux_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_2x_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_4x_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_8x_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_video0_2x_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_periph_2x_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_video1_2x_clk}, }; -static struct aw_clk_nm_def *nm_clks[] = { - &pll_video0_clk, - &pll_ve_clk, - &pll_video1_clk, - &pll_gpu_clk, - &pll9_clk, - &pll10_clk, - &apb2_clk, - &nand0_clk, - &nand1_clk, - &mmc0_clk, - &mmc1_clk, - &mmc2_clk, - &mmc3_clk, - &ts_clk, - &ss_clk, - &spi0_clk, - &spi1_clk, - &spi2_clk, - &spi3_clk, - &mdfs_clk, - &sdram0_clk, - &sdram1_clk, - &be0_clk, - &be1_clk, - &fe0_clk, - &fe1_clk, - &mp_clk, - &lcd0_ch0_clk, - &lcd1_ch0_clk, - &lcd0_ch1_clk, - &lcd1_ch1_clk, - &ve_clk, - &hdmi_clk, - &mbus0_clk, - &mbus1_clk, - &mipi_dsi_clk, - &mipi_dsi_dphy_clk, - &mipi_csi_dphy_clk, - &iep_drc0_clk, - &iep_drc1_clk, - &iep_deu0_clk, - &iep_deu1_clk, -}; +static int +ccu_a31_probe(device_t dev) +{ -static struct aw_clk_prediv_mux_def *prediv_mux_clks[] = { - &ahb1_clk, - &gpu_core_clk, - &gpu_memory_clk, - &gpu_hyd_clk, -}; + if (!ofw_bus_status_okay(dev)) + return (ENXIO); -static struct clk_div_def *div_clks[] = { - &axi_clk, - &apb1_clk, -}; + if (!ofw_bus_is_compatible(dev, "allwinner,sun6i-a31-ccu")) + return (ENXIO); -static struct clk_mux_def *mux_clks[] = { - &cpu_clk, - &daudio0mux_clk, - &daudio1mux_clk, -}; + device_set_desc(dev, "Allwinner A31 Clock Control Unit NG"); + return (BUS_PROBE_DEFAULT); +} -static struct clk_fixed_def *fixed_factor_clks[] = { - &pll_audio_2x_clk, - &pll_audio_4x_clk, - &pll_audio_8x_clk, - &pll_video0_2x_clk, - &pll_periph_2x_clk, - &pll_video1_2x_clk, -}; - -static struct aw_clk_init init_clks[] = { -}; - -void -ccu_a31_register_clocks(struct aw_ccung_softc *sc) +static int +ccu_a31_attach(device_t dev) { - int i; + struct aw_ccung_softc *sc; + sc = device_get_softc(dev); + sc->resets = a31_ccu_resets; sc->nresets = nitems(a31_ccu_resets); sc->gates = a31_ccu_gates; sc->ngates = nitems(a31_ccu_gates); - sc->clk_init = init_clks; - sc->n_clk_init = nitems(init_clks); + sc->clks = a31_ccu_clks; + sc->nclks = nitems(a31_ccu_clks); - for (i = 0; i < nitems(nkmp_clks); i++) - aw_clk_nkmp_register(sc->clkdom, nkmp_clks[i]); - for (i = 0; i < nitems(nm_clks); i++) - aw_clk_nm_register(sc->clkdom, nm_clks[i]); - for (i = 0; i < nitems(prediv_mux_clks); i++) - aw_clk_prediv_mux_register(sc->clkdom, prediv_mux_clks[i]); - - for (i = 0; i < nitems(mux_clks); i++) - clknode_mux_register(sc->clkdom, mux_clks[i]); - for (i = 0; i < nitems(div_clks); i++) - clknode_div_register(sc->clkdom, div_clks[i]); - for (i = 0; i < nitems(fixed_factor_clks); i++) - clknode_fixed_register(sc->clkdom, fixed_factor_clks[i]); + return (aw_ccung_attach(dev)); } + +static device_method_t ccu_a31ng_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, ccu_a31_probe), + DEVMETHOD(device_attach, ccu_a31_attach), + + DEVMETHOD_END +}; + +static devclass_t ccu_a31ng_devclass; + +DEFINE_CLASS_1(ccu_a31ng, ccu_a31ng_driver, ccu_a31ng_methods, + sizeof(struct aw_ccung_softc), aw_ccung_driver); + +EARLY_DRIVER_MODULE(ccu_a31ng, simplebus, ccu_a31ng_driver, + ccu_a31ng_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); Modified: head/sys/arm/allwinner/clkng/ccu_a64.c ============================================================================== --- head/sys/arm/allwinner/clkng/ccu_a64.c Fri Jun 15 06:03:40 2018 (r335189) +++ head/sys/arm/allwinner/clkng/ccu_a64.c Fri Jun 15 08:36:21 2018 (r335190) @@ -1,7 +1,8 @@ /*- - * Copyright (c) 2017 Emmanuel Vadot <manu@freebsd.org> - * All rights reserved. + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * + * Copyright (c) 2017,2018 Emmanuel Vadot <manu@freebsd.org> + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -32,22 +33,25 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> #include <sys/systm.h> #include <sys/bus.h> +#include <sys/rman.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <machine/bus.h> +#include <dev/fdt/simplebus.h> + +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> + #include <dev/extres/clk/clk_div.h> #include <dev/extres/clk/clk_fixed.h> #include <dev/extres/clk/clk_mux.h> #include <arm/allwinner/clkng/aw_ccung.h> -#include <arm/allwinner/clkng/aw_clk.h> -#include <arm/allwinner/clkng/aw_clk_nm.h> -#include <arm/allwinner/clkng/aw_clk_nkmp.h> -#include <arm/allwinner/clkng/aw_clk_prediv_mux.h> #include <gnu/dts/include/dt-bindings/clock/sun50i-a64-ccu.h> #include <gnu/dts/include/dt-bindings/reset/sun50i-a64-ccu.h> -#include "ccu_a64.h" - /* Non-exported clocks */ #define CLK_OSC_12M 0 @@ -680,99 +684,106 @@ NM_CLK(gpu_clk, 31, /* gate */ AW_CLK_HAS_GATE); /* flags */ -static struct aw_clk_nkmp_def *nkmp_clks[] = { - &pll_cpux_clk, - &pll_audio_clk, - &pll_periph0_2x_clk, - &pll_periph1_2x_clk, - &pll_ddr0_clk, - &pll_ddr1_clk, +static struct aw_ccung_clk a64_ccu_clks[] = { + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_cpux_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_audio_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph0_2x_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph1_2x_clk}, *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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