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Date:      Sat, 19 Jul 2003 07:58:01 +0800
From:      "David Xu" <davidxu@freebsd.org>
To:        <deischen@freebsd.org>, "Marcel Moolenaar" <marcel@xcllnt.net>
Cc:        Julian Elischer <julian@elischer.org>
Subject:   Re: Rearranging kse mailbox
Message-ID:  <005201c34d88$6d531bc0$0701a8c0@tiger>
References:  <Pine.GSO.4.10.10307181835080.18163-100000@pcnet5.pcnet.com>

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----- Original Message -----=20
From: "Daniel Eischen" <eischen@vigrid.com>
To: "Marcel Moolenaar" <marcel@xcllnt.net>
Cc: <threads@freebsd.org>; "Julian Elischer" <julian@elischer.org>
Sent: Saturday, July 19, 2003 6:40 AM
Subject: Re: Rearranging kse mailbox


> On Fri, 18 Jul 2003, Marcel Moolenaar wrote:
>=20
> > On Fri, Jul 18, 2003 at 03:08:40PM -0700, Julian Elischer wrote:
> > >=20
> > > the ia64 requires that the thread pointer points to=20
> > > aome location that is 16 bytes long, the first 8 bytes
> > > of which is a pointer to the TLS Dynamic thread vector, and the =
2nd 8
> > > bytes is application specific, but in practice, must be a pointer =
to
> > > the Thread's or KSE's mailbox (I guess KSE to be similar to the =
others.)
> > >=20
> > > ia32 requires just that the thread control info pointed to by %gs
> > > SOMEWHERE contains a pointer to the dtv (where SOMEWHERE is a =
known
> > > offset). (In our case the offset would be 0)
> > >=20
> > > This means that for the UTS to find the active thread under ia64
> > > takes an extra level of indirection. (node neither of these
> > > affect upcalls as teh UTS upcall target function has the mailbox =
as an
> > > argument and can access it independently of %gs or the tp.
> > >=20
> > > Am I right that "variant 2" (as seen in the ia32 case)
> > > applies to allarchitectures other than ia64?
> >=20
> > That is what I need to find out. If the runtime specification has
> > a register dedicated for TLS, like on ia64, it will likely behave
> > more like ia64 than ia32. I think the amd64 runtime is new enough
> > for it to be like ia64.
>=20
> The amd64 also has a %gs which is used for this.  Only the
> kernel can set it, though, so I think it needs to be per-KSE.
>=20
> > Note that the extra level of indirection on ia64 can be avoided if
> > we put the thread control structure at a negative offset from TP.
> > The layout would be something like:
> >=20
> > -...              0            8     16      ...+
> > [thread structure][DTV pointer][free][static TLS]
> >   ^
> >   TP
>=20
> Can we make this work so that we are not limited to
> 8192 (or whatever max user LDTs are) threads on i386?
>=20

I think giving 8192 system scope thread limit on i386
might be OK. system might freeze before you reach this
limit, better to use M:N thread. :-)

> --=20
> Dan Eischen
>=20
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