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Date:      Fri, 9 Oct 2015 22:49:50 +0000 (UTC)
From:      Ian Lepore <ian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r289093 - in head/sys: arm/freescale/imx arm/freescale/vybrid arm/samsung/exynos dev/iicbus dev/pcf powerpc/mpc85xx
Message-ID:  <201510092249.t99MnoGt037223@repo.freebsd.org>

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Author: ian
Date: Fri Oct  9 22:49:50 2015
New Revision: 289093
URL: https://svnweb.freebsd.org/changeset/base/289093

Log:
  Use IIC_EBUSBSY and IIC_BUSERR status values consistantly across all drivers.
  Make it clearer what each one means in the comments that define them.
  
  IIC_BUSBSY was used in many places to mean two different things, either
  "someone else has reserved the bus so you have to wait until they're done"
  or "the signal level on the bus was not in the state I expected before/after
  issuing some command".
  
  Now IIC_BUSERR is used consistantly to refer to protocol/signaling errors,
  and IIC_BUSBSY refers to ownership/reservation of the bus.

Modified:
  head/sys/arm/freescale/imx/imx_i2c.c
  head/sys/arm/freescale/vybrid/vf_i2c.c
  head/sys/arm/samsung/exynos/exynos5_i2c.c
  head/sys/dev/iicbus/iicoc.c
  head/sys/dev/iicbus/iiconf.h
  head/sys/dev/pcf/pcf.c
  head/sys/powerpc/mpc85xx/i2c.c

Modified: head/sys/arm/freescale/imx/imx_i2c.c
==============================================================================
--- head/sys/arm/freescale/imx/imx_i2c.c	Fri Oct  9 22:45:54 2015	(r289092)
+++ head/sys/arm/freescale/imx/imx_i2c.c	Fri Oct  9 22:49:50 2015	(r289093)
@@ -243,7 +243,7 @@ wait_for_xfer(struct i2c_softc *sc, int 
 		sr = i2c_read_reg(sc, I2C_STATUS_REG);
 		if (sr & I2CSR_MIF) {
                         if (sr & I2CSR_MAL) 
-				return (IIC_EBUSBSY);
+				return (IIC_EBUSERR);
 			else if (checkack && (sr & I2CSR_RXAK))
 				return (IIC_ENOACK);
 			else
@@ -350,7 +350,7 @@ i2c_start(device_t dev, u_char slave, in
 	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN);
 	DELAY(10); /* Delay for controller to sample bus state. */
 	if (i2c_read_reg(sc, I2C_STATUS_REG) & I2CSR_MBB) {
-		return (i2c_error_handler(sc, IIC_EBUSBSY));
+		return (i2c_error_handler(sc, IIC_EBUSERR));
 	}
 	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX);
 	if ((error = wait_for_busbusy(sc, true)) != IIC_NOERR)

Modified: head/sys/arm/freescale/vybrid/vf_i2c.c
==============================================================================
--- head/sys/arm/freescale/vybrid/vf_i2c.c	Fri Oct  9 22:45:54 2015	(r289092)
+++ head/sys/arm/freescale/vybrid/vf_i2c.c	Fri Oct  9 22:49:50 2015	(r289093)
@@ -232,7 +232,7 @@ i2c_repeated_start(device_t dev, u_char 
 
 	if ((READ1(sc, I2C_IBSR) & IBSR_IBB) == 0) {
 		mtx_unlock(&sc->mutex);
-		return (IIC_EBUSBSY);
+		return (IIC_EBUSERR);
 	}
 
 	/* Set repeated start condition */
@@ -275,7 +275,7 @@ i2c_start(device_t dev, u_char slave, in
 	if (READ1(sc, I2C_IBSR) & IBSR_IBB) {
 		mtx_unlock(&sc->mutex);
 		vf_i2c_dbg(sc, "cant i2c start: IIC_EBUSBSY\n");
-		return (IIC_EBUSBSY);
+		return (IIC_EBUSERR);
 	}
 
 	/* Set start condition */

Modified: head/sys/arm/samsung/exynos/exynos5_i2c.c
==============================================================================
--- head/sys/arm/samsung/exynos/exynos5_i2c.c	Fri Oct  9 22:45:54 2015	(r289092)
+++ head/sys/arm/samsung/exynos/exynos5_i2c.c	Fri Oct  9 22:49:50 2015	(r289093)
@@ -263,8 +263,8 @@ i2c_start(device_t dev, u_char slave, in
 	error = wait_for_nibb(sc);
 	if (error) {
 		mtx_unlock(&sc->mutex);
-		DPRINTF("cant i2c start: IIC_EBUSBSY\n");
-		return (IIC_EBUSBSY);
+		DPRINTF("cant i2c start: IIC_EBUSERR\n");
+		return (IIC_EBUSERR);
 	}
 
 	reg = READ1(sc, I2CCON);

Modified: head/sys/dev/iicbus/iicoc.c
==============================================================================
--- head/sys/dev/iicbus/iicoc.c	Fri Oct  9 22:45:54 2015	(r289092)
+++ head/sys/dev/iicbus/iicoc.c	Fri Oct  9 22:49:50 2015	(r289093)
@@ -236,7 +236,7 @@ iicoc_detach(device_t dev)
 static int 
 iicoc_start(device_t dev, u_char slave, int timeout)
 {
-	int error = IIC_EBUSBSY;
+	int error = IIC_EBUSERR;
 	struct iicoc_softc *sc;
 
 	sc = device_get_softc(dev);

Modified: head/sys/dev/iicbus/iiconf.h
==============================================================================
--- head/sys/dev/iicbus/iiconf.h	Fri Oct  9 22:45:54 2015	(r289092)
+++ head/sys/dev/iicbus/iiconf.h	Fri Oct  9 22:49:50 2015	(r289093)
@@ -82,10 +82,10 @@
  * adapter layer errors
  */
 #define IIC_NOERR	0x0	/* no error occured */
-#define IIC_EBUSERR	0x1	/* bus error */
+#define IIC_EBUSERR	0x1	/* bus error (hardware not in expected state) */
 #define IIC_ENOACK	0x2	/* ack not received until timeout */
 #define IIC_ETIMEOUT	0x3	/* timeout */
-#define IIC_EBUSBSY	0x4	/* bus busy */
+#define IIC_EBUSBSY	0x4	/* bus busy (reserved by another client) */
 #define IIC_ESTATUS	0x5	/* status error */
 #define IIC_EUNDERFLOW	0x6	/* slave ready for more data */
 #define IIC_EOVERFLOW	0x7	/* too much data */

Modified: head/sys/dev/pcf/pcf.c
==============================================================================
--- head/sys/dev/pcf/pcf.c	Fri Oct  9 22:45:54 2015	(r289092)
+++ head/sys/dev/pcf/pcf.c	Fri Oct  9 22:49:50 2015	(r289093)
@@ -170,7 +170,7 @@ pcf_start(device_t dev, u_char slave, in
 		printf("pcf: busy!\n");
 #endif
 		PCF_UNLOCK(sc);
-		return (IIC_EBUSBSY);
+		return (IIC_EBUSERR);
 	}
 
 	/* set slave address to PCF. Last bit (LSB) must be set correctly

Modified: head/sys/powerpc/mpc85xx/i2c.c
==============================================================================
--- head/sys/powerpc/mpc85xx/i2c.c	Fri Oct  9 22:45:54 2015	(r289092)
+++ head/sys/powerpc/mpc85xx/i2c.c	Fri Oct  9 22:49:50 2015	(r289093)
@@ -284,7 +284,7 @@ i2c_start(device_t dev, u_char slave, in
 		debugf("bus busy");
 		mtx_unlock(&sc->mutex);
 		i2c_stop(dev);
-		return (IIC_EBUSBSY);
+		return (IIC_EBUSERR);
 	}
 
 	/* Set start condition */



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