From owner-svn-src-all@freebsd.org Fri May 25 07:26:57 2018 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 8C9F1F74EAB; Fri, 25 May 2018 07:26:57 +0000 (UTC) (envelope-from theraven@FreeBSD.org) Received: from theravensnest.org (theravensnest.org [46.226.110.62]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "theravensnest.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id F225F761FF; Fri, 25 May 2018 07:26:56 +0000 (UTC) (envelope-from theraven@FreeBSD.org) Received: from [192.168.1.65] (host86-145-125-203.range86-145.btcentralplus.com [86.145.125.203]) (authenticated bits=0) by theravensnest.org (8.15.2/8.15.2) with ESMTPSA id w4P7QfC2066934 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 25 May 2018 07:26:42 GMT (envelope-from theraven@FreeBSD.org) X-Authentication-Warning: mail: Host host86-145-125-203.range86-145.btcentralplus.com [86.145.125.203] claimed to be [192.168.1.65] Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 10.3 \(3273\)) Subject: Re: Deorbiting i386 From: David Chisnall In-Reply-To: Date: Fri, 25 May 2018 08:26:43 +0100 Cc: Mark Linimon , Matthew Macy , Andrew Gallatin , Pedro Giffuni , Cy Schubert , Brooks Davis , Eugene Grosbein , Stefan Esser , "rgrimes@freebsd.org" , Gleb Smirnoff , Sean Bruno , "svn-src-head@freebsd.org" , "svn-src-all@freebsd.org" , "src-committers@freebsd.org" Content-Transfer-Encoding: quoted-printable Message-Id: <05C5BD86-70D0-4B02-AC29-36E68B3602AE@FreeBSD.org> References: <201805232218.w4NMIxMA067892@slippy.cwsent.com> <18a87d6d-14af-ef9d-80ff-403039e36692@cs.duke.edu> <20180525003949.GA710@lonesome.com> To: Maxim Sobolev X-Mailer: Apple Mail (2.3273) X-Mailman-Approved-At: Fri, 25 May 2018 10:39:55 +0000 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 May 2018 07:26:57 -0000 On 25 May 2018, at 05:27, Maxim Sobolev wrote: >=20 > The idea looks very inmature and short-sighted to me. i386 is here to = stay not as a server/desktop platform but as an embedded/low power/low = cost platform for at least 5-10 years to come. There are plenty of = applications in the world that don't need > 3gb of memory space and have = no use for extra bits (and extra silicon) to function. This argument seems very odd to me. If you are targeting the embedded = space, it is far easier to build a low-power chip that targets the = x86-64 ISA than the x86-32 ISA. You can move all of the 80-bit floating = point stuff into microcode. You can put anything using = pair-of-32-bit-register 64-bit operations into slow microcode. You can = skimp on store forwarding for stack addresses. You actually need fewer = rename registers (one of the biggest consumers of power), because x86-64 = code needs to do less register juggling to fit in the architectural = register space. All of these things are big consumers of power and area = and are far less necessary when running code compiled for x86-64. You = can also do tricks like the one that Intel did on the early Atoms, where = the SSE ALUs are actually only 64 bits wide and the 128-bit ops are = cracked into pairs of 64-bit micro-ops. As to =E2=80=98not needing more than 3GB of memory space=E2=80=99, = that=E2=80=99s what the x32 ABI is for. This lets you get all of the = advantages of the x86-64 ISA (of which there are very many, in = comparison to x86-32), without needing 64-bit pointers. You get the = instruction density of x86-64 combined with the data density of x86-32. = This is what Intel and Centaur have been pushing in the embedded space = for several years. You do pay a slight hardware cost from supporting a 48-bit virtual = address space, though with superpages that=E2=80=99s negligible and the = hardware targeted at these applications often doesn=E2=80=99t support = more than a 32-bit virtual address space. =20 And this completely ignores the fact that Intel has almost no presence = in the low-end embedded space. AArch32 is vastly more important there = and if we dropped x86-32 and shifted that effort to AArch32 then I think = we=E2=80=99d see a lot more adoption. David=