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Date:      Tue, 21 Sep 1999 23:13:36 -0400 (EDT)
From:      "Brian F. Feldman" <green@FreeBSD.org>
To:        Luoqi Chen <luoqi@watermarkgroup.com>
Cc:        current@FreeBSD.org, phk@FreeBSD.org, smp@FreeBSD.org
Subject:   Re:  Testers please!
Message-ID:  <Pine.BSF.4.10.9909212306120.10399-100000@janus.syracuse.net>
In-Reply-To: <199909220025.UAA25595@lor.watermarkgroup.com>

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On Tue, 21 Sep 1999, Luoqi Chen wrote:

> This reminds me about the usage of TSC counter on SMP. First even though
> we don't use TSC for time keeping on SMP, the TSC frequency from calibration
> is still valid (at least for BSP), and we can show it in the cpu identification
> message. Second, the listed reason for not using TSC on SMP is the inability
> to synchronize TSCs on all cpus. My question is, is it really necessary?
> TSC is initialized to 0 at hardware reset, which should happen to all CPUs
> at the same time (invalid assumption?), in another words, all TSCs should be
> automatically synchronized.

ISTRT something I did long ago was kill the TSC reset FreeBSD did, so
there should be no reason that they won't be all at the same place.  I
am willing to bet half my farm that the biggest problem was that we
did that, and barring that we could have always done SMP using the TSC.

One question comes to mind: is there a way that the TSCs could become
desynchronized somehow?  Even though all CPUs run at the same frequency,
isn't there a strong possibility for slight frequency deviation since
we use crystal oscillation instead of a more accurate atomic breakdown
for regulation, or am I just smoking crack?

> 
> -lq
> 
> 
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-- 
 Brian Fundakowski Feldman           \  FreeBSD: The Power to Serve!  /
 green@FreeBSD.org                    `------------------------------'



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