From owner-svn-src-all@FreeBSD.ORG Sun Feb 23 22:10:26 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 942A0DF9; Sun, 23 Feb 2014 22:10:26 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 62B4E1A9A; Sun, 23 Feb 2014 22:10:26 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s1NMAQDL055685; Sun, 23 Feb 2014 22:10:26 GMT (envelope-from rwatson@svn.freebsd.org) Received: (from rwatson@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s1NMAQun055683; Sun, 23 Feb 2014 22:10:26 GMT (envelope-from rwatson@svn.freebsd.org) Message-Id: <201402232210.s1NMAQun055683@svn.freebsd.org> From: Robert Watson Date: Sun, 23 Feb 2014 22:10:26 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r262402 - in head/sys/boot/ficl: . mips64 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 23 Feb 2014 22:10:26 -0000 Author: rwatson Date: Sun Feb 23 22:10:25 2014 New Revision: 262402 URL: http://svnweb.freebsd.org/changeset/base/262402 Log: Give mips64 its own ficl configuration that sizes pointers/etc suitably for a 64-bit architecture, rather than trying to share the 32-bit MIPS ficl configuration. When building ficl on MIPS, don't conflate 32-bit and 64-bit ISAs -- unlike x86, we don't want a 32-bit loader on a 64-bit CPU. Use quite conservative code generation -- e.g., softfloat, no GOT, etc -- suitable for early boot. MFC after: 3 weeks Sponsored by: DARPA, AFRL Added: head/sys/boot/ficl/mips64/ - copied from r262374, head/sys/boot/ficl/mips/ Modified: head/sys/boot/ficl/Makefile head/sys/boot/ficl/mips64/sysdep.h Modified: head/sys/boot/ficl/Makefile ============================================================================== --- head/sys/boot/ficl/Makefile Sun Feb 23 22:04:03 2014 (r262401) +++ head/sys/boot/ficl/Makefile Sun Feb 23 22:10:25 2014 (r262402) @@ -5,6 +5,8 @@ FICLDIR?= ${.CURDIR} .if !defined(FICL64) .PATH: ${FICLDIR}/${MACHINE_CPUARCH:S/amd64/i386/} +.elif ${MACHINE_ARCH} == "mips64" +.PATH: ${FICLDIR}/${MACHINE_ARCH} .else .PATH: ${FICLDIR}/${MACHINE_CPUARCH} .endif @@ -21,12 +23,15 @@ CFLAGS.gcc+= -mpreferred-stack-boundary= .endif CFLAGS+= -mno-mmx -mno-3dnow -mno-sse -mno-sse2 -mno-sse3 -msoft-float .endif -.if ${MACHINE_CPUARCH} == "powerpc" || ${MACHINE_CPUARCH} == "arm" +.if ${MACHINE_CPUARCH} == "powerpc" || ${MACHINE_CPUARCH} == "arm" || ${MACHINE_CPUARCH} == "mips" CFLAGS+= -msoft-float .endif .if ${MACHINE} == "pc98" CFLAGS+= -Os -DPC98 .endif +.if ${MACHINE_CPUARCH} == "mips" +CFLAGS+= -G0 -fno-pic -mno-abicalls +.endif .if HAVE_PNP CFLAGS+= -DHAVE_PNP .endif Modified: head/sys/boot/ficl/mips64/sysdep.h ============================================================================== --- head/sys/boot/ficl/mips/sysdep.h Sun Feb 23 17:37:24 2014 (r262374) +++ head/sys/boot/ficl/mips64/sysdep.h Sun Feb 23 22:10:25 2014 (r262402) @@ -105,11 +105,11 @@ ** (11/2000: same for FICL_FLOAT) */ #if !defined FICL_INT -#define FICL_INT INT32 +#define FICL_INT long #endif #if !defined FICL_UNS -#define FICL_UNS UNS32 +#define FICL_UNS unsigned long #endif #if !defined FICL_FLOAT @@ -120,7 +120,7 @@ ** Ficl presently supports values of 32 and 64 for BITS_PER_CELL */ #if !defined BITS_PER_CELL -#define BITS_PER_CELL 32 +#define BITS_PER_CELL 64 #endif #if ((BITS_PER_CELL != 32) && (BITS_PER_CELL != 64)) @@ -366,7 +366,7 @@ typedef struct ** machine. 3 would be appropriate for a 64 bit machine. */ #if !defined FICL_ALIGN -#define FICL_ALIGN 2 +#define FICL_ALIGN 3 #define FICL_ALIGN_ADD ((1 << FICL_ALIGN) - 1) #endif