Date: Tue, 18 Oct 2005 09:44:02 -0400 From: Andrew Gallatin <gallatin@cs.duke.edu> To: David Xu <davidxu@FreeBSD.org> Cc: cvs-src@FreeBSD.org, src-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/amd64/amd64 cpu_switch.S machdep.c Message-ID: <20051018094402.A29138@grasshopper.cs.duke.edu> In-Reply-To: <200510172310.j9HNAVPL013057@repoman.freebsd.org>; from davidxu@FreeBSD.org on Mon, Oct 17, 2005 at 11:10:31PM %2B0000 References: <200510172310.j9HNAVPL013057@repoman.freebsd.org>
next in thread | previous in thread | raw e-mail | index | archive | help
David Xu [davidxu@FreeBSD.org] wrote: > davidxu 2005-10-17 23:10:31 UTC > > FreeBSD src repository > > Modified files: > sys/amd64/amd64 cpu_switch.S machdep.c > Log: > Micro optimization for context switch. Eliminate code for saving gs.base > and fs.base. We always update pcb.pcb_gsbase and pcb.pcb_fsbase > when user wants to set them, in context switch routine, we only need to > write them into registers, we never have to read them out from registers > when thread is switched away. Since rdmsr is a serialization instruction, > micro benchmark shows it is worthy to do. Nice. This reduces lmbench context switch latency by about 0.4us (7.2 -> 6.8us), and reduces TCP loopback latency by about 0.9us (36.1 -> 35.2) on my dual core 3800+ It is a shame we can't find a way to use the TSC as a timecounter on SMP systems. It seems that about 40% of the context switch time is spent just waiting for the PIO read of the ACPI-fast or i8254 to return. Drew
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?20051018094402.A29138>