Skip site navigation (1)Skip section navigation (2)
Date:      Sat, 4 Oct 1997 20:55:47 -0600 (MDT)
From:      Wes Peters <softweyr@xmission.com>
To:        Tom <tom@sdf.com>
Cc:        chat@freebsd.org
Subject:   Re: supermicro p6sns/p6sas 
Message-ID:  <199710050255.UAA07165@obie.softweyr.ml.org>
In-Reply-To: <Pine.BSF.3.95q.970929231719.5433A-100000@misery.sdf.com>
References:  <199709300503.WAA12579@MindBender.serv.net> <Pine.BSF.3.95q.970929231719.5433A-100000@misery.sdf.com>

next in thread | previous in thread | raw e-mail | index | archive | help
tom@sdf.com writes:
 >   Yes, I was just thinking about that.  If gcc is randomly dying on older
 > K6 processors, is it actually producing correct object code when it
 > doesn't crash?

Yes.  It is producing correct code when it crashes, too.  It just jumps
to the wrong address, which quickly leads to a crash.

 >   AMD and Cyrix scare me.  Intel's true competition is DEC, Motorola/IBM,
 > Sparc, and MIPS.  

And you assume they are perfect?  Hah!  The only way to trust any
silicon is to read the errata sheets in great detail, and then
disbelieve 90% of what you read.  These chips are more complex than
software, and their designers don't have any better idea what's
happening inside the chips than you do inside the FreeBSD VM management
code.

-- 
          "Where am I, and what am I doing in this handbasket?"

Wes Peters                                                       Softweyr LLC
http://www.xmission.com/~softweyr                       softweyr@xmission.com



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199710050255.UAA07165>