From owner-freebsd-mips@FreeBSD.ORG Tue Jan 6 03:14:48 2015 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 78126519; Tue, 6 Jan 2015 03:14:48 +0000 (UTC) Received: from mho-02-ewr.mailhop.org (mho-02-ewr.mailhop.org [204.13.248.72]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 4852F2121; Tue, 6 Jan 2015 03:14:47 +0000 (UTC) Received: from [73.34.117.227] (helo=ilsoft.org) by mho-02-ewr.mailhop.org with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.72) (envelope-from ) id 1Y8KbQ-000JSs-Ts; Tue, 06 Jan 2015 03:14:41 +0000 Received: from revolution.hippie.lan (revolution.hippie.lan [172.22.42.240]) by ilsoft.org (8.14.9/8.14.9) with ESMTP id t063Ed7N033810; Mon, 5 Jan 2015 20:14:39 -0700 (MST) (envelope-from ian@freebsd.org) X-Mail-Handler: Dyn Standard SMTP by Dyn X-Originating-IP: 73.34.117.227 X-Report-Abuse-To: abuse@dyndns.com (see http://www.dyndns.com/services/sendlabs/outbound_abuse.html for abuse reporting information) X-MHO-User: U2FsdGVkX18AboSO+yg7zWA+71/q3x5Z Message-ID: <1420514079.14601.7.camel@freebsd.org> Subject: Re: interrupt muxes, bus memory space and other fun amusing things From: Ian Lepore To: Warner Losh Date: Mon, 05 Jan 2015 20:14:39 -0700 In-Reply-To: <9F6D585C-7590-4D25-879B-A76D8A959E01@bsdimp.com> References: <5F7CBB50-6C91-49C9-BF69-301496DDE792@bsdimp.com> <9F6D585C-7590-4D25-879B-A76D8A959E01@bsdimp.com> Content-Type: text/plain; charset="iso-8859-7" X-Mailer: Evolution 3.12.8 FreeBSD GNOME Team Port Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by ilsoft.org id t063Ed7N033810 Cc: Warner Losh , "freebsd-mips@freebsd.org" , John Baldwin X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Jan 2015 03:14:48 -0000 On Mon, 2015-01-05 at 20:10 -0700, Warner Losh wrote: > > On Jan 5, 2015, at 1:31 PM, Adrian Chadd wrote: > >=20 > > On 5 January 2015 at 08:41, Warner Losh wrote: > >>=20 > >>> So if I were Linux, I'd just implement a mux that pretends to trigg= er > >>> interrupts in a much bigger IRQ space. Ie, they map IP0..IP7 to > >>> irq0..7, then they pick another IRQ range for the AHB interrupts, a= nd > >>> another IRQ range for the IP2/IP3 interrupt mux. They have a > >>> hard-coded mux that takes care of triggering the software IRQ based= on > >>> the hardware interrupt and mux register contents. > >>>=20 > >>> So, how should I approach this? > >>=20 > >> Same way. You=A2d create an interrupt device that registers an inter= rupt > >> for the mux, then farms it out based on the contents of the register= s. > >> The MIPS interrupt handler might need some work (arm did) to > >> allow this to happen, but it isn=A2t super difficult (though IIRc it= is tedious). > >=20 > > Ok. So I can do that, but then devices hang off of which bus? nexus0? > > Or this mux? > >=20 > > Can I create a mux bus to hang things off of that just pass all the > > memory region requests up to the parent bus (nexus in this case) ? >=20 > The hard part is mapping an interrupt provided by a mux to a resource > number. However, we already do this for the =A1hard wired=A2 interrupts > that are muxed through APIC or PIC controllers on x86. I fail to see ho= w > this is any different, apart (perhaps) from the need to do things dynam= ically > in some way. >=20 > Warner >=20 It sounds like mips is ready for intrng. Which would then give us ppc, arm, and mips all with a conceptually-similar intrng-like layer for handling non-hierarchical interrupt sources and controllers and mapping between rman and hardware ideas of interrupt number. Hmmm. This would be the time to argue for a nice shiny new MI intrng implementation... except that we can't quite drive even the arm-only version to completion. -- Ian