Date: Sat, 24 May 2014 23:29:28 +0200 From: Michael Tuexen <tuexen@freebsd.org> To: Andrew Turner <andrew@fubar.geek.nz> Cc: Hans Petter Selasky <hps@selasky.org>, svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org, Mark R V Murray <markm@FreeBSD.org> Subject: Re: svn commit: r266083 - in head/sys/arm: arm include Message-ID: <61D0CEF5-6D52-4C3B-8727-8474ECD045EA@freebsd.org> In-Reply-To: <20140524220215.79032279@bender.Home> References: <201405141911.s4EJBFZZ097826@svn.freebsd.org> <537D0952.2040001@selasky.org> <7610C8E6-3F01-4317-BC1A-67645A162CD7@FreeBSD.org> <083E3DCB-F49A-4757-9CF8-689D04267E26@freebsd.org> <20140524220215.79032279@bender.Home>
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On 24 May 2014, at 23:02, Andrew Turner <andrew@fubar.geek.nz> wrote: > On Sat, 24 May 2014 21:09:56 +0200 > Michael Tuexen <tuexen@freebsd.org> wrote: >=20 >> On 22 May 2014, at 09:09, Mark R V Murray <markm@FreeBSD.org> wrote: >>=20 >>>=20 >>> On 21 May 2014, at 21:15, Hans Petter Selasky <hps@selasky.org> >>> wrote: >>>=20 >>>> On 05/14/14 21:11, Mark Murray wrote: >>>>> Author: markm >>>>> Date: Wed May 14 19:11:15 2014 >>>>> New Revision: 266083 >>>>> URL: http://svnweb.freebsd.org/changeset/base/266083 >>>>>=20 >>>>> Log: >>>>> Give suitably-endowed ARMs a register similar to the x86 TSC >>>>> register. >>>>>=20 >>>>=20 >>>> Hi, >>>>=20 >>>> Regression issue: >>>> This commit prevents RPI-B from booting. >>>=20 >>> Thanks, I=92ll look at it ASAP. >> Doesn't the ARM1176 use for example >> MRC p15, 0, <Rd>, c15, c12, 1 ; Read Cycle Counter Register >> to read the value, whereas the=20 >> you use=20 >> __asm __volatile("mrc p15, 0, %0, c9, c13, 0": "=3Dr" (ccnt)); >=20 > On ARMv6 there is no guarantee of a cycle count register. On the > ARM1176 there is one in an implementation defined section of the = system > control coprocessor. This is the c15 section above, and is accessible > as shown. >=20 > On ARMv7 there are optional performance monitor extensions. These are > in parts of the c9 section of the coprocessor. As it is optional there > is no requirement for implementers to include this functionality, > however I would expect the ARM designs to include it, and most non-ARM > designs are likely aiming for performance so will also include them. >=20 > If the ARMv7 processor has the performance extensions the existing = code > appears correct to retrieve it. The code is #ifdef as #if defined(CPU_ARM1136) || defined(CPU_ARM1176) \ || defined(CPU_MV_PJ4B) \ || defined(CPU_CORTEXA) || defined(CPU_KRAIT) Isn't the Raspberry Pi defining CPU_ARM1176 and using ARMv6? So can we = use the same code for all plattforms in the #ifdef? Best regards Michael >=20 > Andrew >=20 >=20
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