From owner-svn-src-projects@FreeBSD.ORG Thu Oct 29 23:22:41 2009 Return-Path: Delivered-To: svn-src-projects@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 974A41065694; Thu, 29 Oct 2009 23:22:41 +0000 (UTC) (envelope-from rrs@lakerest.net) Received: from lakerest.net (unknown [IPv6:2001:240:585:2:213:d4ff:fef3:2d8d]) by mx1.freebsd.org (Postfix) with ESMTP id 119BC8FC0A; Thu, 29 Oct 2009 23:22:40 +0000 (UTC) Received: from [10.1.1.53] ([10.1.1.53]) (authenticated bits=0) by lakerest.net (8.14.3/8.14.3) with ESMTP id n9TNMZu7084071 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NOT); Thu, 29 Oct 2009 19:22:35 -0400 (EDT) (envelope-from rrs@lakerest.net) Message-Id: <6CCB8B83-4DA5-4494-9919-82C778E9745F@lakerest.net> From: Randall Stewart To: Julian Elischer In-Reply-To: <4AEA1E78.3010008@elischer.org> Content-Type: text/plain; charset=US-ASCII; format=flowed; delsp=yes Content-Transfer-Encoding: 7bit Mime-Version: 1.0 (Apple Message framework v936) Date: Thu, 29 Oct 2009 19:22:35 -0400 References: <200910292130.n9TLUM2A010750@svn.freebsd.org> <4AEA1E78.3010008@elischer.org> X-Mailer: Apple Mail (2.936) Cc: svn-src-projects@FreeBSD.org, src-committers@FreeBSD.org Subject: Re: svn commit: r198629 - projects/mips/sys/mips/rmi X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Oct 2009 23:22:41 -0000 Twas not me.. I suppose I could read the manuals I have and add comments BUT I would first have to check with RMI on that.. since I have been authorized to commit their code (and any mod's I need to make).. but I had to sign a NDA to get the manuals and such.. so I may not be able to ;-( R On Oct 29, 2009, at 7:00 PM, Julian Elischer wrote: > Randall Stewart wrote: >> Author: rrs >> Date: Thu Oct 29 21:30:21 2009 >> New Revision: 198629 >> URL: http://svn.freebsd.org/changeset/base/198629 >> Log: >> adds rmi specific mips extensions file and makes sure >> the includes point to the new place. > > nice.. pitty someone stripped out the fifty or so lines of comments > that this file mus SURELY have had when it was written.. (surely?) > >> Added: >> projects/mips/sys/mips/rmi/rmi_mips_exts.h >> Modified: >> projects/mips/sys/mips/rmi/xlr_machdep.c >> projects/mips/sys/mips/rmi/xlr_pci.c >> Added: projects/mips/sys/mips/rmi/rmi_mips_exts.h >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- /dev/null 00:00:00 1970 (empty, because file is newly added) >> +++ projects/mips/sys/mips/rmi/rmi_mips_exts.h Thu Oct 29 21:30:21 >> 2009 (r198629) >> @@ -0,0 +1,144 @@ >> +/*- >> + * Copyright (c) 2003-2009 RMI Corporation >> + * All rights reserved. >> + * >> + * Redistribution and use in source and binary forms, with or >> without >> + * modification, are permitted provided that the following >> conditions >> + * are met: >> + * 1. Redistributions of source code must retain the above copyright >> + * notice, this list of conditions and the following disclaimer. >> + * 2. Redistributions in binary form must reproduce the above >> copyright >> + * notice, this list of conditions and the following disclaimer >> in the >> + * documentation and/or other materials provided with the >> distribution. >> + * 3. Neither the name of RMI Corporation, nor the names of its >> contributors, >> + * may be used to endorse or promote products derived from this >> software >> + * without specific prior written permission. >> + * >> + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS >> IS'' AND >> + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED >> TO, THE >> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A >> PARTICULAR PURPOSE >> + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS >> BE LIABLE >> + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR >> CONSEQUENTIAL >> + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF >> SUBSTITUTE GOODS >> + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS >> INTERRUPTION) >> + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN >> CONTRACT, STRICT >> + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING >> IN ANY WAY >> + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE >> POSSIBILITY OF >> + * SUCH DAMAGE. >> + * >> + * RMI_BSD */ >> +#ifndef __MIPS_EXTS_H__ >> +#define __MIPS_EXTS_H__ >> + >> +#define enable_KX(flags) __asm__ __volatile__ ( \ >> + ".set push\n" \ >> + ".set noat\n" \ >> + ".set noreorder\n" \ >> + "mfc0 %0, $12\n\t" \ >> + "ori $1, %0, 0x81\n\t" \ >> + "xori $1, 1\n\t" \ >> + "mtc0 $1, $12\n" \ >> + ".set pop\n" \ >> + : "=r"(flags) ) >> + >> +#define disable_KX(flags) __asm__ __volatile__ ( \ >> + ".set push\n" \ >> + "mtc0 %0, $12\n" \ >> + ".set pop\n" \ >> + : : "r"(flags) ) >> + >> +#define CPU_BLOCKID_IFU 0 >> +#define CPU_BLOCKID_ICU 1 >> +#define CPU_BLOCKID_IEU 2 >> +#define CPU_BLOCKID_LSU 3 >> +#define CPU_BLOCKID_MMU 4 >> +#define CPU_BLOCKID_PRF 5 >> + >> +#define LSU_CERRLOG_REGID 9 >> + >> +static __inline__ unsigned int read_32bit_phnx_ctrl_reg(int block, >> int reg) >> +{ + unsigned int __res; >> + >> + __asm__ __volatile__( + ".set >> \tpush\n\t" + ".set\tnoreorder\n\t" >> + "move $9, %1\n" + /* "mfcr\t$8, $9\n\t" */ >> + ".word 0x71280018\n" >> + "move %0, $8\n" >> + ".set\tpop" + : "=r" (__res) : "r"((block<<8)|reg) >> + : "$8", "$9" >> + ); >> + return __res; >> +} >> + >> +static __inline__ void write_32bit_phnx_ctrl_reg(int block, int >> reg, unsigned int value) >> +{ >> + __asm__ __volatile__( + ".set\tpush\n\t" >> + ".set\tnoreorder\n\t" >> + "move $8, %0\n" >> + "move $9, %1\n" >> + /* "mtcr\t$8, $9\n\t" */ >> + ".word 0x71280019\n" >> + ".set\tpop" >> + : >> + : "r" (value), "r"((block<<8)|reg) >> + : "$8", "$9" >> + ); >> +} >> + >> +static __inline__ unsigned long long read_64bit_phnx_ctrl_reg(int >> block, int reg) >> +{ >> + unsigned int high, low; >> + >> + __asm__ __volatile__( >> + ".set\tmips64\n\t" >> + "move $9, %2\n" >> + /* "mfcr $8, $9\n" */ >> + ".word 0x71280018\n" >> + "dsrl32 %0, $8, 0\n\t" + "dsll32 $8, $8, 0\n >> \t" + "dsrl32 %1, $8, 0\n >> \t" + ".set mips0" >> + : "=r" (high), "=r"(low) >> + : "r"((block<<8)|reg) >> + : "$8", "$9" >> + ); >> + >> + return ( (((unsigned long long)high)<<32) | low); >> +} >> + >> +static __inline__ void write_64bit_phnx_ctrl_reg(int block, int >> reg,unsigned long long value) >> +{ >> + __uint32_t low, high; >> + high = value >> 32; >> + low = value & 0xffffffff; >> + >> + __asm__ __volatile__( >> + ".set push\n" >> + ".set noreorder\n" >> + ".set mips4\n\t" >> + /* Set up "rs" */ >> + "move $9, %0\n" >> + >> + /* Store 64 bit value in "rt" */ >> + "dsll32 $10, %1, 0 \n\t" >> + "dsll32 $8, %2, 0 \n\t" >> + "dsrl32 $8, $8, 0 \n\t" >> + "or $10, $8, $8 \n\t" >> + >> + ".word 0x71280019\n" /* mtcr $8, $9 */ >> + >> + ".set pop\n" >> + >> + : /* No outputs */ >> + : "r"((block<<8)|reg), "r" (high), "r" (low) >> + : "$8", "$9", "$10" >> + ); >> +} >> + >> + >> +#endif >> Modified: projects/mips/sys/mips/rmi/xlr_machdep.c >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- projects/mips/sys/mips/rmi/xlr_machdep.c Thu Oct 29 21:25:16 >> 2009 (r198628) >> +++ projects/mips/sys/mips/rmi/xlr_machdep.c Thu Oct 29 21:30:21 >> 2009 (r198629) >> @@ -69,7 +69,7 @@ >> #include >> #include >> #include >> -#include >> +#include >> #include >> #include >> Modified: projects/mips/sys/mips/rmi/xlr_pci.c >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- projects/mips/sys/mips/rmi/xlr_pci.c Thu Oct 29 21:25:16 2009 >> (r198628) >> +++ projects/mips/sys/mips/rmi/xlr_pci.c Thu Oct 29 21:30:21 2009 >> (r198629) >> @@ -38,7 +38,7 @@ >> #include >> #include >> #include >> -#include >> +#include >> #include >> #include >> #include > ------------------------------ Randall Stewart 803-317-4952 (cell) 803-345-0391(direct)