Date: Mon, 11 Apr 2005 08:27:47 -0700 (PDT) From: Matthew Dillon <dillon@apollo.backplane.com> To: Peter Jeremy <PeterJeremy@optushome.com.au> Cc: freebsd-current@freebsd.org Subject: Re: Potential source of interrupt aliasing Message-ID: <200504111527.j3BFRlld050811@apollo.backplane.com> References: <20050406233405.O47071@carver.gumbysoft.com> <200504081656.51917.jhb@FreeBSD.org> <20050410152946.W82708@carver.gumbysoft.com> <20050410172818.D82708@carver.gumbysoft.com> <200504110231.j3B2VOYr047361@apollo.backplane.com> <20050411083006.GJ89047@cirb503493.alcatel.com.au>
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:Both the 8080 and 8085 supported vectored interrupts to a limited
:extent. The 6800 and 6809 don't support vectored interrupts. The
:Z-80, 68000 and 8086 all fully support vectored interrupts. But the
:Z-80 and 68000 both need the designer to (exclusively) use the Z-80 or
:68000 peripheral chips in order to take advantage of their vectored
:interrupts. Using a separate interrupt controller means that you can
:use bog-standard peripherals that just have INTR outputs.
:
:It's a pity that the modern PC is hamstrung by design decisions made
:over 25 years ago.
:
:--
:Peter Jeremy
The 68000 had a nice system, and you didn't have to use 68000 peripheral
chips to take advantage of it. You could a auto-vector the IACK cycle
for certain SPLs (the poor man's solution) or, even better, you could map
RAM into the autovector space (basically ignore the FC lines) and then
use a simple 8:3 (or other) selector to generate the vector for some or
the SPLs for chips that could not generate one themselves.
It's sad to know that a single 20 year + old $0.10 14 pin chip can outdo
an APIC.
-Matt
Matthew Dillon
<dillon@backplane.com>
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