Date: Mon, 3 Apr 2006 16:04:27 GMT From: John Baldwin <jhb@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 94544 for review Message-ID: <200604031604.k33G4Rko015117@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=94544 Change 94544 by jhb@jhb_slimer on 2006/04/03 16:04:13 bde@ inspired cleanups. Affected files ... .. //depot/projects/smpng/sys/i386/i386/machdep.c#105 edit .. //depot/projects/smpng/sys/i386/isa/npx.c#55 edit Differences ... ==== //depot/projects/smpng/sys/i386/i386/machdep.c#105 (text+ko) ==== @@ -1234,9 +1234,22 @@ unsigned int cr0; cr0 = rcr0(); + /* - * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the - * BSP. See the comments there about why we set them. + * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: + * + * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT + * instructions. We must set the CR0_MP bit and use the CR0_TS + * bit to control the trap, because setting the CR0_EM bit does + * not cause WAIT instructions to trap. It's important to trap + * WAIT instructions - otherwise the "wait" variants of no-wait + * control instructions would degenerate to the "no-wait" variants + * after FP context switches but work correctly otherwise. It's + * particularly important to trap WAITs when there is no NPX - + * otherwise the "wait" variants would always degenerate. + * + * Try setting CR0_NE to get correct error reporting on 486DX's. + * Setting it should fail or do nothing on lesser processors. */ cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; load_cr0(cr0); ==== //depot/projects/smpng/sys/i386/isa/npx.c#55 (text+ko) ==== @@ -234,10 +234,8 @@ } /* - * Probe routine. Initialize cr0 to give correct behaviour for [f]wait - * whether the device exists or not (XXX should be elsewhere). Set flags - * to tell npxattach() what to do. Setup an interrupt handler if npx does - * need to use interrupts. Return 0 if device exists. + * Probe routine. Set flags to tell npxattach() what to do. Set up an + * interrupt handler if npx needs to use interrupts. */ static int npx_probe(dev) @@ -250,9 +248,6 @@ u_short control; u_short status; - KASSERT((rcr0() & (CR0_MP | CR0_NE)) == (CR0_MP | CR0_NE), - ("cr0 busted")); - device_set_desc(dev, "math processor"); /* @@ -294,24 +289,10 @@ outb(IO_NPX, 0); /* - * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT - * instructions. We must set the CR0_MP bit and use the CR0_TS - * bit to control the trap, because setting the CR0_EM bit does - * not cause WAIT instructions to trap. It's important to trap - * WAIT instructions - otherwise the "wait" variants of no-wait - * control instructions would degenerate to the "no-wait" variants - * after FP context switches but work correctly otherwise. It's - * particularly important to trap WAITs when there is no NPX - - * otherwise the "wait" variants would always degenerate. - * - * Try setting CR0_NE to get correct error reporting on 486DX's. - * Setting it should fail or do nothing on lesser processors. - */ - load_cr0(rcr0() | CR0_MP | CR0_NE); - /* - * But don't trap while we're probing. + * Don't trap while we're probing. */ stop_emulating(); + /* * Finish resetting the coprocessor, if any. If there is an error * pending, then we may get a bogus IRQ13, but npx_intr() will handle @@ -419,14 +400,12 @@ flags = device_get_flags(dev); - if (!device_is_quiet(dev) || bootverbose) { - if (npx_irq13) - device_printf(dev, "IRQ 13 interface\n"); - else if (npx_ex16) - device_printf(dev, "INT 16 interface\n"); - else - device_printf(dev, "WARNING: no FPU!\n"); - } + if (npx_irq13) + device_printf(dev, "IRQ 13 interface\n"); + else if (!npx_ex16) + device_printf(dev, "WARNING: no FPU!\n"); + else if (!device_is_quiet(dev) || bootverbose) + device_printf(dev, "INT 16 interface\n"); npxinit(__INITIAL_NPXCW__);
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