Date: Tue, 28 Dec 2004 22:26:36 +0100 From: =?ISO-8859-1?Q?S=F8ren_Schmidt?= <sos@DeepCore.dk> To: =?ISO-8859-1?Q?S=F8ren_Schmidt?= <sos@DeepCore.dk> Cc: Soren Schmidt <sos@FreeBSD.ORG> Subject: Re: ATA regression [PATCH] Message-ID: <41D1CF8C.20802@DeepCore.dk> In-Reply-To: <41D1BAD3.5020804@DeepCore.dk> References: <20041224094127.GA75931@ip.net.ua> <41CC425C.7050906@DeepCore.dk> <20041224220821.GB86330@ip.net.ua> <41CC9BDA.7020203@DeepCore.dk> <20041224233021.GA43419@ip.net.ua> <41CFEFAF.8040100@DeepCore.dk> <20041227141310.GA95767@ip.net.ua> <41D03AA4.3020908@DeepCore.dk> <20041228110644.GB14010@ip.net.ua> <41D15650.7080504@DeepCore.dk> <20041228152641.GC14010@ip.net.ua> <41D1BAD3.5020804@DeepCore.dk>
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S=F8ren Schmidt wrote:
> Oh crap! I just got the first half of the patch in the diff, sorry 'bou=
t=20
> that. I'll get the rest along when I get back to the lab tomorrow...
OK, try this instead, I hope I managed to get it all pulled over this=20
time...
--=20
-S=F8ren
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Index: ata-chipset.c
===================================================================
RCS file: /home/ncvs/src/sys/dev/ata/ata-chipset.c,v
retrieving revision 1.97
diff -u -r1.97 ata-chipset.c
--- ata-chipset.c 24 Dec 2004 13:36:04 -0000 1.97
+++ ata-chipset.c 28 Dec 2004 21:24:08 -0000
@@ -1367,6 +1367,11 @@
return ENXIO;
}
+ if (ctlr->chip->max_dma >= ATA_SA150)
+ ctlr->setmode = ata_sata_setmode;
+ else
+ ctlr->setmode = ata_promise_setmode;
+
switch (ctlr->chip->cfg1) {
case PRNEW:
/* setup clocks */
@@ -1413,22 +1418,33 @@
ctlr->dmainit = ata_promise_mio_dmainit;
ctlr->allocate = ata_promise_mio_allocate;
- if (ctlr->chip->cfg2 & PRPATA) {
- ctlr->channels = ((ATA_INL(ctlr->r_res2, 0x48) & 0x01) > 0) +
- ((ATA_INL(ctlr->r_res2, 0x48) & 0x02) > 0) + 2;
- }
- else if (ctlr->chip->cfg2 & PRCMBO) {
- ATA_OUTL(ctlr->r_res2, 0x06c, 0x000000ff);
- ctlr->channels = ((ATA_INL(ctlr->r_res2, 0x48) & 0x02) > 0) + 3;
- }
- else if (ctlr->chip->cfg2 & PRCMBO2) {
- ATA_OUTL(ctlr->r_res2, 0x060, 0x000000ff);
- ctlr->channels = 3;
- }
- else
- ctlr->channels = 4;
+ switch (ctlr->chip->cfg2) {
+ case PRPATA:
+ ctlr->channels = ((ATA_INL(ctlr->r_res2, 0x48) & 0x01) > 0) +
+ ((ATA_INL(ctlr->r_res2, 0x48) & 0x02) > 0) + 2;
+ break;
+
+ case PRCMBO:
+ ATA_OUTL(ctlr->r_res2, 0x06c, 0x000000ff);
+ ctlr->channels = ((ATA_INL(ctlr->r_res2, 0x48) & 0x02) > 0) + 3;
+ break;
- if (ctlr->chip->cfg2 & PRSX4X) {
+ case PRSATA:
+ ATA_OUTL(ctlr->r_res2, 0x06c, 0x000000ff);
+ ctlr->channels = 4;
+ break;
+
+ case PRCMBO2:
+ ATA_OUTL(ctlr->r_res2, 0x060, 0x000000ff);
+ ctlr->channels = 3;
+ break;
+
+ case PRSATA2:
+ ATA_OUTL(ctlr->r_res2, 0x060, 0x000000ff);
+ ctlr->channels = 4;
+ break;
+
+ case PRSX4X: {
struct ata_promise_sx4 *hpkt;
u_int32_t dimm = ATA_INL(ctlr->r_res2, 0x000c0080);
@@ -1448,26 +1464,25 @@
mtx_init(&hpkt->mtx, "ATA promise HPKT lock", NULL, MTX_DEF);
hpkt->busy = hpkt->head = hpkt->tail = 0;
+ ctlr->channels = 4;
+
if ((bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS,
ata_promise_sx4_intr, ctlr, &ctlr->handle))) {
device_printf(dev, "unable to setup interrupt\n");
return ENXIO;
}
- }
- else {
- if ((bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS,
- ata_promise_mio_intr, ctlr, &ctlr->handle))) {
- device_printf(dev, "unable to setup interrupt\n");
- return ENXIO;
+ return 0;
}
}
- break;
+
+ if ((bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS,
+ ata_promise_mio_intr, ctlr, &ctlr->handle))) {
+ device_printf(dev, "unable to setup interrupt\n");
+ return ENXIO;
+ }
+ return 0;
}
- if (ctlr->chip->max_dma >= ATA_SA150)
- ctlr->setmode = ata_sata_setmode;
- else
- ctlr->setmode = ata_promise_setmode;
- return 0;
+ return ENXIO;
}
static int
@@ -1587,13 +1602,13 @@
struct ata_pci_controller *ctlr =
device_get_softc(device_get_parent(ch->dev));
- if (ctlr->chip->cfg2 & PRSX4X) {
+ switch (ctlr->chip->cfg2) {
+ case PRSX4X: {
struct ata_promise_sx4 *hpktp = ctlr->driver;
- /* softreset channels ATA module */
+ /* softreset channel ATA module */
ATA_OUTL(ctlr->r_res2, 0xc0260 + (ch->unit << 7), ch->unit + 1);
DELAY(1000);
-
ATA_OUTL(ctlr->r_res2, 0xc0260 + (ch->unit << 7),
(ATA_INL(ctlr->r_res2, 0xc0260 + (ch->unit << 7)) &
~0x00003f9f) | (ch->unit + 1));
@@ -1606,8 +1621,20 @@
ATA_OUTL(ctlr->r_res2, 0xc012c,
(ATA_INL(ctlr->r_res2, 0xc012c) & ~0x00000f9f));
mtx_unlock(&hpktp->mtx);
- }
- else if (ctlr->chip->cfg2 & PRSATA) {
+ }
+ break;
+
+ case PRCMBO:
+ case PRCMBO2:
+ /* softreset channel ATA module */
+ ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), (1 << 11));
+ ata_udelay(10000);
+ ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7),
+ (ATA_INL(ctlr->r_res2, 0x0260 + (ch->unit << 7)) &
+ ~0x00003f9f) | (ch->unit + 1));
+ break;
+
+ case PRSATA: {
u_int32_t status = 0;
int timeout;
@@ -1633,14 +1660,16 @@
if (timeout >= 1000000)
device_printf(ch->dev, "connect status=%08x\n", status);
- /* enable plug/unplug intr */
+ /* reset and enable plug/unplug intr */
ATA_OUTL(ctlr->r_res2, 0x06c, (0x00000011 << ch->unit));
- }
- else if (ctlr->chip->cfg2 & PRSATA2) {
+ }
+ break;
+
+ case PRSATA2: {
u_int32_t status = 0;
int timeout;
- /* set PM port */
+ /* set portmultiplier port */
ATA_OUTL(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f);
/* mask plug/unplug intr */
@@ -1670,11 +1699,13 @@
if (timeout >= 1000000)
device_printf(ch->dev, "connect status=%08x\n", status);
- /* enable plug/unplug intr */
+ /* reset and enable plug/unplug intr */
ATA_OUTL(ctlr->r_res2, 0x060, (0x00000011 << ch->unit));
- /* set PM port */
- ATA_OUTL(ctlr->r_res2, 0x4e8 + (ch->unit * 0x100), 0x00);
+ /* set portmultiplier port */
+ ATA_OUTL(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x00);
+ }
+ break;
}
}
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