From owner-freebsd-current@FreeBSD.ORG Wed Jan 17 00:52:05 2007 Return-Path: X-Original-To: freebsd-current@FreeBSD.org Delivered-To: freebsd-current@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id D7FB316A407; Wed, 17 Jan 2007 00:52:05 +0000 (UTC) (envelope-from sobomax@FreeBSD.org) Received: from sippysoft.com (gk.360sip.com [72.236.70.226]) by mx1.freebsd.org (Postfix) with ESMTP id 281E313C457; Wed, 17 Jan 2007 00:52:05 +0000 (UTC) (envelope-from sobomax@FreeBSD.org) Received: from [192.168.1.47] ([204.244.149.125]) (authenticated bits=0) by sippysoft.com (8.13.8/8.13.6) with ESMTP id l0H0U0NS095908 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 16 Jan 2007 16:30:04 -0800 (PST) (envelope-from sobomax@FreeBSD.org) Message-ID: <45AD6DFA.6030808@FreeBSD.org> Date: Tue, 16 Jan 2007 16:29:46 -0800 From: Maxim Sobolev Organization: Sippy Software, Inc. User-Agent: Thunderbird 1.5.0.9 (Windows/20061207) MIME-Version: 1.0 To: Attilio Rao References: <3bbf2fe10607250813w8ff9e34pc505bf290e71758@mail.gmail.com> <3bbf2fe10607251004wf94e238xb5ea7a31c973817f@mail.gmail.com> <3bbf2fe10607261127p3f01a6c3w80027754f7d4e594@mail.gmail.com> <3bbf2fe10607281004o6727e976h19ee7e054876f914@mail.gmail.com> <3bbf2fe10701160851r79b04464m2cbdbb7f644b22b6@mail.gmail.com> <20070116154258.568e1aaf@pleiades.nextvenue.com> <3bbf2fe10701161525j6ad9292y93502b8df0f67aa9@mail.gmail.com> In-Reply-To: <3bbf2fe10701161525j6ad9292y93502b8df0f67aa9@mail.gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-current@FreeBSD.org, Ivan Voras , freebsd-arch@FreeBSD.org Subject: Re: [PATCH] Mantaining turnstile aligned to 128 bytes in i386 CPUs X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Jan 2007 00:52:06 -0000 Attilio Rao wrote: > 2007/1/17, Ivan Voras : >> Kip Macy wrote: >> > On 1/16/07, Ivan Voras wrote: >> >> But it does seem to hurt the performance a bit - maybe it's time to >> add >> >> another CPU option like I586_CPU and I686_CPU? >> > >> > Unless there is a compelling reason not to do so, I think that that >> > would be a good idea. >> >> Maybe even someone finds a way to get optimized versions of memcpy in >> the kernel :) >> >> I was thinking: AFAIK the only major stopper is context saving of the >> various "auxiliary" registers - FPU, MMX, SSE, right? But is it an >> all-or-nothing situation? I.e. does it make sense (can it be done?) to >> just elect to save the MMX context? (AFAIK they are different registers >> than SSE, but overlay FPU registers?) The idea is to save something >> smaller than the full set. > > When I implemented fpu copy into the kernel I had a lot of thinking > about this and I think it is possible at least with some restrictions. > For example, for an xmm copy you would just save 8 registers content > but you have to ensure no pending FPU exceptions will break your > kernel and so you should preserve a clean copy of FPU state or, treact > the corner cases you can get. > For xmm, after some very productive discussions with bde@, we arrived > at the conclusion that should be pretty safe to just have an 16 byte > aligned buffer for registers saving (in this way you can use 8 movdqa > for saving them) but I didn't end to play with it. > (My implementation should deal with the problem of pinning the > scheduler too, in order to avoid a wrong reading of per-cpu datas). I might be wrong, but I think the DragonFly has solved this issue (i.e. optimized memcpy in the kernel) somehow quite some time ago. -Maxim