Date: Tue, 16 Sep 2014 10:16:40 -0600 From: Brett Glass <brett@lariat.net> To: pyunyh@gmail.com Cc: questions@freebsd.org, net@freebsd.org Subject: Re: jme interface bounces up and down, up and down.... Message-ID: <201409161727.LAA25854@mail.lariat.net> In-Reply-To: <20140916083749.GA988@michelle.fasterthan.com> References: <201409141629.KAA29705@mail.lariat.net> <20140915060819.GA967@michelle.fasterthan.com> <201409151447.IAA08325@mail.lariat.net> <20140916083749.GA988@michelle.fasterthan.com>
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So, what is the best solution? I cannot throw out the machine, and because I am using a VLAN switch to multiplex the port to three LANs I do not want to reduce the speed to 100 Mbps. Ideas? --Brett Glass At 02:37 AM 9/16/2014, Yonghyeon PYUN wrote: >On Mon, Sep 15, 2014 at 08:19:37AM -0600, Brett Glass wrote: > > At 12:08 AM 9/15/2014, Yonghyeon PYUN wrote: > > > > >Would you show me the output of dmesg(jme(4) and jmphy(4) only) to > > >know exact chip revision? > > > > Here you are. > > > > jme0: <JMicron Inc, JMC25x Gigabit Ethernet> port > > 0xec80-0xecff,0xe800-0xe8ff mem 0xfbffc000-0xfbfff > > fff irq 18 at device 0.0 on pci1 > > jme0: MSIX count : 8 > > jme0: MSI count : 8 > > jme0: attempting to allocate 1 MSI-X vectors (8 supported) > > msi: routing MSI-X IRQ 256 to local APIC 0 vector 52 > > jme0: using IRQ 256 for MSI-X > > jme0: Using 1 MSIX messages. > > jme0: PCI device revision : 0x0250 > > jme0: Chip revision : 0x11 > ^^^^^^^^^^^^^^^^^^^^^^^^^^ > >Initially I suspected you might have relatively new JMC25x >controller but it seems you have early revision of the >controller(JMC250 A2). Early revision of the controller has >1000baseT link establishment issue with 802.3az capable switches. >The issue is explained in jme(4) man page. The known workaround is >to manually set 100baseTX media. I recall you mentioned Linux had >no problems so I wonder Linux was able to establish a 1000baseT >link. >In theory, the workaround could be implemented in driver but it >is layering violation and will have to duplicate lots of work done >by mii(4). > > > jme0: ethernet hardware address not found in EEPROM. > > jme0: PHY is at address 1. > > jme0: Read request size : 512 bytes. > > jme0: TLP payload size : 128 bytes. > > miibus0: <MII bus> on jme0 > > jmphy0: <JMP211 10/100/1000 media interface> PHY 1 on miibus0 > > jmphy0: OUI 0x00d831, model 0x0021, rev. 1 > > jmphy0: none, 10baseT, 10baseT-FDX, 10baseT-FDX-flow, 100baseTX, > > 100baseTX-FDX, 100baseTX-FDX-flow, > > 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, > > 1000baseT-FDX-flow, 1000baseT-FDX > > -flow-master, auto, auto-flow > > jme0: bpf attached > > jme0: Ethernet address: e0:cb:4e:54:23:ac > > > > I do not particularly like JMicron chips (their faulty SSD > > controllers have cost me a lot of time and money), but that's > >I don't have experiences with other JMicron products so can't >comment on SSD. JMC25x may not be world best gigabit ethernet >controller but I was quite satisfied with its high performance and >clear documentation and Vendor's support. > > > what's on the motherboard of this Asus. So, I need to find a way to > > make it work. > > > > --Brett Glass > >
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