Date: Mon, 20 Feb 2006 17:10:19 +0000 From: Gary Palmer <gpalmer@freebsd.org> To: Joao Barros <joao.barros@gmail.com> Cc: scsi@freebsd.org Subject: Re: NAS w/ multipath Message-ID: <43F9F7FB.1000805@freebsd.org> In-Reply-To: <70e8236f0602161437o1593c147na97239cf9054610e@mail.gmail.com> References: <2CEE6163475607F32A420FA1@jordgubbe.pingpong.net> <20060207121257.D53605@mgmt.uniserve.ca> <20060214150845.GB29569@in-addr.com> <20060214103146.K99735@mgmt.uniserve.ca> <70e8236f0602161437o1593c147na97239cf9054610e@mail.gmail.com>
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Joao Barros wrote: >On 2/14/06, Tom Samplonius <tom@uniserve.com> wrote: > > >>On Tue, 14 Feb 2006, Gary Palmer wrote: >> >> >> >>>I suspect higher end devices (e.g. HDS and EMC Symmetrix units) this >>>isn't a problem, but in mid range and lower end stuff I'd expect problems >>>if the paths landed on separate controllers on the array. >>> >>> >> I don't think this is a problem with current mid-range stuff. A mirrored >>write cache is considered a basic feature. Not only does a mirrored write cache >>protect against controller cache consistancy, it also protects losing the >>contents of the write cache if a controller fails, which is generally a much >>bigger problem. >> >> > >The EMC Clarion Series, at least the CX600 model I work with has >mirrored write cache. >In the event of controller failure it is disabled until redundancy is restored. >I had training on an entry level model, a CX300 and the funcionality >was the same. > >The Symetrix I bet it has but EMC doesn't let us touch those ;-) > > I know of at least 2 arrays from one manufacturer (which I suspect were actaully the same controller "heads" just with different numbers of drive trays and/or drive busses supported) which were aimed at the midrange "class" and did NOT support writing to the same LUN through different controllers. The controllers took the LUN offline for a while (measured in seconds, from memory) to hand off the LUN from one controller (the "owner") to the other (the one that had received the last write). This played havoc with systems who weren't using the vendor-supplied drivers, which we suspect were just delaying and retrying I/Os until the LUN came back. Maybe mirrored write cache isn't enough and there are other firmware things that are needed for this to work properly. The Symetrix should be fine as it, at least the last time I got a preso from EMC, has one cache shared amongst the host controllers. But if you are expecting to be able to write to a LUN through any controller, then its worth testing that the array doesn't have pathological behaviour. After the stuff I've seen, I can't make the assumption that it'll just work anymore.
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