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Date:      Mon, 21 Jan 2002 00:59:41 +0100 (CET)
From:      Michal Mertl <mime@traveller.cz>
To:        Garrett Wollman <wollman@khavrinen.lcs.mit.edu>
Cc:        arch@FreeBSD.ORG
Subject:   Re: 64 bit counters again
Message-ID:  <Pine.BSF.4.41.0201210058340.94442-100000@prg.traveller.cz>
In-Reply-To: <200201202125.g0KLPqf31593@khavrinen.lcs.mit.edu>

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On Sun, 20 Jan 2002, Garrett Wollman wrote:

> I hope you'll forgive me for reopening this up to -arch again....
>
> <<On Sat, 19 Jan 2002 21:20:26 +0100 (CET), Michal Mertl <mime@traveller.cz> said:
>
> > But compare and exchange or conditional move insns should be there.
> > And because the platform is fully 64 bit AFAIK I'd expect at least
> > 64 bit variants of them. The cache coherency problem is also
> > unrelated - it's there whatever size you have.
>
> The ultimate upshot of this is that it does not make sense to expose
> low-level primitives (such as compare-exchange or LL/SC) directly in
> the API.  This is because each processor architecture will have its

It isn't exposed in the API as far as I see.

> own requirements for coherency, in some cases requiring specialized
> instructions which a compiler would not normally generate, and often
> requiring memory barriers inside the spin loop.
>
> However, we can easily define a set of basic operations which every
> architecture we currently support can implement reliably and
> coherently without locking, including incrementing counters and
> updating some kinds of linked lists.  (This has been proven both
> formally and by construction; see a recent Algorithms textbook.)

Seems so.


-- 
Michal Mertl
mime@traveller.cz



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