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Subject: [Bug 219589] head -r317820 (e.g.); stable/11: TARGET_ARCH=powerpc
 needs a (somewhat dynamic) variant of powerpc64's 205458 fix if PowerMac G5's
 are to be supported
Date: Sat, 27 May 2017 09:13:18 +0000
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https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D219589

--- Comment #4 from Mark Millard <markmi@dsl-only.net> ---
(In reply to Mark Millard from comment #3)

I forgot to deal with the prepare side of things.
So, now with both prepare and restore code fixes,
this code boots.

# svnlite diff /usr/src/sys/powerpc/ofw/ofw_machdep.c=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20
                           Index: /usr/src/sys/powerpc/ofw/ofw_machdep.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- /usr/src/sys/powerpc/ofw/ofw_machdep.c      (revision 317820)
+++ /usr/src/sys/powerpc/ofw/ofw_machdep.c      (working copy)
@@ -111,26 +111,27 @@
         * Assume that interrupt are disabled at this point, or
         * SPRG1-3 could be trashed
         */
-#ifdef __powerpc64__
-       __asm __volatile("mtsprg1 %0\n\t"
-                        "mtsprg2 %1\n\t"
-                        "mtsprg3 %2\n\t"
-                        :
-                        : "r"(ofmsr[2]),
-                        "r"(ofmsr[3]),
-                        "r"(ofmsr[4]));
-#else
-       __asm __volatile("mfsprg0 %0\n\t"
-                        "mtsprg0 %1\n\t"
-                        "mtsprg1 %2\n\t"
-                        "mtsprg2 %3\n\t"
-                        "mtsprg3 %4\n\t"
-                        : "=3D&r"(ofw_sprg0_save)
-                        : "r"(ofmsr[1]),
-                        "r"(ofmsr[2]),
-                        "r"(ofmsr[3]),
-                        "r"(ofmsr[4]));
+#ifndef __powerpc64__
+       if (!(cpu_features & PPC_FEATURE_64))
+               __asm __volatile("mfsprg0 %0\n\t"
+                                "mtsprg0 %1\n\t"
+                                "mtsprg1 %2\n\t"
+                                "mtsprg2 %3\n\t"
+                                "mtsprg3 %4\n\t"
+                                : "=3D&r"(ofw_sprg0_save)
+                                : "r"(ofmsr[1]),
+                                "r"(ofmsr[2]),
+                                "r"(ofmsr[3]),
+                                "r"(ofmsr[4]));
+       else
 #endif
+               __asm __volatile("mtsprg1 %0\n\t"
+                                "mtsprg2 %1\n\t"
+                                "mtsprg3 %2\n\t"
+                                :
+                                : "r"(ofmsr[2]),
+                                "r"(ofmsr[3]),
+                                "r"(ofmsr[4]));
 }

 static __inline void
@@ -147,7 +148,8 @@
         * PCPU data cannot be used until this routine is called !
         */
 #ifndef __powerpc64__
-       __asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save));
+       if (!(cpu_features & PPC_FEATURE_64))
+               __asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save));
 #endif
 }
 #endif

--=20
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