From owner-svn-src-all@FreeBSD.ORG Mon Apr 15 19:32:15 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 7091FBE5; Mon, 15 Apr 2013 19:32:15 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 49677160D; Mon, 15 Apr 2013 19:32:15 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.6/8.14.6) with ESMTP id r3FJWEX1043460; Mon, 15 Apr 2013 19:32:14 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.6/8.14.5/Submit) id r3FJWEJB043459; Mon, 15 Apr 2013 19:32:14 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <201304151932.r3FJWEJB043459@svn.freebsd.org> From: Warner Losh Date: Mon, 15 Apr 2013 19:32:14 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r249523 - head/sys/mips/include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Apr 2013 19:32:15 -0000 Author: imp Date: Mon Apr 15 19:32:14 2013 New Revision: 249523 URL: http://svnweb.freebsd.org/changeset/base/249523 Log: Fix N32/N64 register saving by ensuring that all registers resolve to unique values. There's some confusion about what the n32 assembler API really is (since on page 9 of the spec they say that t0-t3 don't exist, then turn around on page 22 and say that t4-t7 don't exist), and this doesn't touch that. NetBSD's version of this file follows the convention I used here, and is likely to be correct. This should fix gdb/ptrace. Modified: head/sys/mips/include/regnum.h Modified: head/sys/mips/include/regnum.h ============================================================================== --- head/sys/mips/include/regnum.h Mon Apr 15 18:56:03 2013 (r249522) +++ head/sys/mips/include/regnum.h Mon Apr 15 19:32:14 2013 (r249523) @@ -42,9 +42,8 @@ #ifndef _MACHINE_REGNUM_H_ #define _MACHINE_REGNUM_H_ -/* This must match the numbers - * in pcb.h and is used by - * swtch.S +/* + * This must match the numbers in pcb.h and is used by swtch.S */ #define PREG_S0 0 #define PREG_S1 1 @@ -64,6 +63,7 @@ /* * Location of the saved registers relative to ZERO. * This must match struct trapframe defined in frame.h exactly. + * This must also match regdef.h. */ #define ZERO 0 #define AST 1 @@ -73,6 +73,16 @@ #define A1 5 #define A2 6 #define A3 7 +#if defined(__mips_n32) || defined(__mips_n64) +#define A4 8 +#define A5 9 +#define A6 10 +#define A7 11 +#define T0 12 +#define T1 13 +#define T2 14 +#define T3 15 +#else #define T0 8 #define T1 9 #define T2 10 @@ -81,6 +91,7 @@ #define TA1 13 #define TA2 14 #define TA3 15 +#endif #define S0 16 #define S1 17 #define S2 18 @@ -113,6 +124,23 @@ #define NUMSAVEREGS 40 /* + * Pseudo registers so we save a complete set of registers regardless of + * the ABI + */ +#if defined(__mips_n32) || defined(__mips_n64) +#define TA0 8 +#define TA1 9 +#define TA2 10 +#define TA3 11 +#else +#define TA0 12 +#define TA1 13 +#define TA2 14 +#define TA3 15 +#endif + + +/* * Index of FP registers in 'struct frame', counting from the beginning * of the frame (i.e., including the general registers). */