From owner-dev-commits-src-all@freebsd.org Tue Sep 28 16:57:33 2021 Return-Path: Delivered-To: dev-commits-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 8AD856A83A1; Tue, 28 Sep 2021 16:57:33 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4HJlzx3B3cz4RMv; Tue, 28 Sep 2021 16:57:33 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 3EF87279F2; Tue, 28 Sep 2021 16:57:33 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 18SGvXfV035368; Tue, 28 Sep 2021 16:57:33 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 18SGvXCI035367; Tue, 28 Sep 2021 16:57:33 GMT (envelope-from git) Date: Tue, 28 Sep 2021 16:57:33 GMT Message-Id: <202109281657.18SGvXCI035367@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Kevin Bowling Subject: git: e6f324c15f7a - stable/13 - e1000: Use C99 bool types MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: kbowling X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: e6f324c15f7ab1d85700ab08f16787c5625a1483 Auto-Submitted: auto-generated X-BeenThere: dev-commits-src-all@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Commit messages for all branches of the src repository List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 28 Sep 2021 16:57:33 -0000 The branch stable/13 has been updated by kbowling (ports committer): URL: https://cgit.FreeBSD.org/src/commit/?id=e6f324c15f7ab1d85700ab08f16787c5625a1483 commit e6f324c15f7ab1d85700ab08f16787c5625a1483 Author: Kevin Bowling AuthorDate: 2021-09-17 03:08:08 +0000 Commit: Kevin Bowling CommitDate: 2021-09-28 16:55:53 +0000 e1000: Use C99 bool types Approved by: imp MFC after: 1 week (cherry picked from commit 1bbdc25fc1edb43562bf2a5f30df7381078991d4) --- sys/dev/e1000/e1000_80003es2lan.c | 12 +++--- sys/dev/e1000/e1000_82541.c | 10 ++--- sys/dev/e1000/e1000_82543.c | 22 +++++------ sys/dev/e1000/e1000_82571.c | 60 ++++++++++++++--------------- sys/dev/e1000/e1000_82575.c | 58 ++++++++++++++-------------- sys/dev/e1000/e1000_api.c | 12 +++--- sys/dev/e1000/e1000_api.h | 4 +- sys/dev/e1000/e1000_hw.h | 2 +- sys/dev/e1000/e1000_i210.c | 4 +- sys/dev/e1000/e1000_ich8lan.c | 78 +++++++++++++++++++------------------- sys/dev/e1000/e1000_mac.c | 62 +++++++++++++++--------------- sys/dev/e1000/e1000_manage.c | 28 +++++++------- sys/dev/e1000/e1000_mbx.c | 2 +- sys/dev/e1000/e1000_mbx.h | 2 +- sys/dev/e1000/e1000_osdep.h | 2 - sys/dev/e1000/e1000_phy.c | 80 +++++++++++++++++++-------------------- sys/dev/e1000/e1000_vf.c | 14 +++---- sys/dev/e1000/e1000_vf.h | 2 +- sys/dev/e1000/em_txrx.c | 12 +++--- sys/dev/e1000/if_em.c | 46 +++++++++++----------- sys/dev/e1000/igb_txrx.c | 2 +- 21 files changed, 256 insertions(+), 258 deletions(-) diff --git a/sys/dev/e1000/e1000_80003es2lan.c b/sys/dev/e1000/e1000_80003es2lan.c index db6f1aeb65fb..ac35b4eabf28 100644 --- a/sys/dev/e1000/e1000_80003es2lan.c +++ b/sys/dev/e1000/e1000_80003es2lan.c @@ -219,14 +219,14 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw) /* Set rar entry count */ mac->rar_entry_count = E1000_RAR_ENTRIES; /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; + mac->asf_firmware_present = true; /* FWSM register */ - mac->has_fwsm = TRUE; + mac->has_fwsm = true; /* ARC supported; valid only if manageability features are enabled. */ mac->arc_subsystem_valid = !!(E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK); /* Adaptive IFS not supported */ - mac->adaptive_ifs = FALSE; + mac->adaptive_ifs = false; /* Function pointers */ @@ -891,8 +891,8 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw) reg_data &= ~0x00100000; E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data); - /* default to TRUE to enable the MDIC W/A */ - hw->dev_spec._80003es2lan.mdic_wa_enable = TRUE; + /* default to true to enable the MDIC W/A */ + hw->dev_spec._80003es2lan.mdic_wa_enable = true; ret_val = e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_OFFSET >> @@ -900,7 +900,7 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw) if (!ret_val) { if ((i & E1000_KMRNCTRLSTA_OPMODE_MASK) == E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO) - hw->dev_spec._80003es2lan.mdic_wa_enable = FALSE; + hw->dev_spec._80003es2lan.mdic_wa_enable = false; } /* Clear all of the statistics registers (clear on read). It is diff --git a/sys/dev/e1000/e1000_82541.c b/sys/dev/e1000/e1000_82541.c index aaa3de7f02ce..7bb2e8ea9449 100644 --- a/sys/dev/e1000/e1000_82541.c +++ b/sys/dev/e1000/e1000_82541.c @@ -230,7 +230,7 @@ static s32 e1000_init_mac_params_82541(struct e1000_hw *hw) /* Set rar entry count */ mac->rar_entry_count = E1000_RAR_ENTRIES; /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; + mac->asf_firmware_present = true; /* Function Pointers */ @@ -611,11 +611,11 @@ static s32 e1000_check_for_link_82541(struct e1000_hw *hw) goto out; if (!link) { - ret_val = e1000_config_dsp_after_link_change_82541(hw, FALSE); + ret_val = e1000_config_dsp_after_link_change_82541(hw, false); goto out; /* No link detected */ } - mac->get_link_status = FALSE; + mac->get_link_status = false; /* * Check if there was DownShift, must be checked @@ -632,7 +632,7 @@ static s32 e1000_check_for_link_82541(struct e1000_hw *hw) goto out; } - ret_val = e1000_config_dsp_after_link_change_82541(hw, TRUE); + ret_val = e1000_config_dsp_after_link_change_82541(hw, true); /* * Auto-Neg is enabled. Auto Speed Detection takes care @@ -937,7 +937,7 @@ out: * Success returns 0, Failure returns 1 * * The low power link up (lplu) state is set to the power management level D3 - * and SmartSpeed is disabled when active is TRUE, else clear lplu for D3 + * and SmartSpeed is disabled when active is true, else clear lplu for D3 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is diff --git a/sys/dev/e1000/e1000_82543.c b/sys/dev/e1000/e1000_82543.c index 49049b8646cd..9a93090c2d33 100644 --- a/sys/dev/e1000/e1000_82543.c +++ b/sys/dev/e1000/e1000_82543.c @@ -256,7 +256,7 @@ static s32 e1000_init_mac_params_82543(struct e1000_hw *hw) /* Set tbi compatibility */ if ((hw->mac.type != e1000_82543) || (hw->phy.media_type == e1000_media_type_fiber)) - e1000_set_tbi_compatibility_82543(hw, FALSE); + e1000_set_tbi_compatibility_82543(hw, false); return E1000_SUCCESS; } @@ -286,7 +286,7 @@ void e1000_init_function_pointers_82543(struct e1000_hw *hw) static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw) { struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; - bool state = FALSE; + bool state = false; DEBUGFUNC("e1000_tbi_compatibility_enabled_82543"); @@ -338,7 +338,7 @@ out: bool e1000_tbi_sbp_enabled_82543(struct e1000_hw *hw) { struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; - bool state = FALSE; + bool state = false; DEBUGFUNC("e1000_tbi_sbp_enabled_82543"); @@ -379,7 +379,7 @@ static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state) * @hw: pointer to the HW structure * * Returns the current status of whether PHY initialization is disabled. - * True if PHY initialization is disabled else FALSE. + * True if PHY initialization is disabled else false. **/ static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw) { @@ -389,7 +389,7 @@ static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw) DEBUGFUNC("e1000_init_phy_disabled_82543"); if (hw->mac.type != e1000_82543) { - ret_val = FALSE; + ret_val = false; goto out; } @@ -913,7 +913,7 @@ static s32 e1000_reset_hw_82543(struct e1000_hw *hw) E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP); E1000_WRITE_FLUSH(hw); - e1000_set_tbi_sbp_82543(hw, FALSE); + e1000_set_tbi_sbp_82543(hw, false); /* * Delay to allow any outstanding PCI transactions to complete before @@ -1217,7 +1217,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw) if (!link) goto out; /* No link detected */ - mac->get_link_status = FALSE; + mac->get_link_status = false; e1000_check_downshift_generic(hw); @@ -1299,7 +1299,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw) * If we previously were in the mode, * turn it off. */ - e1000_set_tbi_sbp_82543(hw, FALSE); + e1000_set_tbi_sbp_82543(hw, false); rctl = E1000_READ_REG(hw, E1000_RCTL); rctl &= ~E1000_RCTL_SBP; E1000_WRITE_REG(hw, E1000_RCTL, rctl); @@ -1313,7 +1313,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw) * will look like CRC errors to the hardware. */ if (!e1000_tbi_sbp_enabled_82543(hw)) { - e1000_set_tbi_sbp_82543(hw, TRUE); + e1000_set_tbi_sbp_82543(hw, true); rctl = E1000_READ_REG(hw, E1000_RCTL); rctl |= E1000_RCTL_SBP; E1000_WRITE_REG(hw, E1000_RCTL, rctl); @@ -1356,7 +1356,7 @@ static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw) (!(status & E1000_STATUS_LU)) && (!(rxcw & E1000_RXCW_C))) { if (!mac->autoneg_failed) { - mac->autoneg_failed = TRUE; + mac->autoneg_failed = true; ret_val = 0; goto out; } @@ -1387,7 +1387,7 @@ static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw) E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU)); - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } out: diff --git a/sys/dev/e1000/e1000_82571.c b/sys/dev/e1000/e1000_82571.c index 8db1fcb921a9..cae9afcb2d78 100644 --- a/sys/dev/e1000/e1000_82571.c +++ b/sys/dev/e1000/e1000_82571.c @@ -285,7 +285,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) struct e1000_mac_info *mac = &hw->mac; u32 swsm = 0; u32 swsm2 = 0; - bool force_clear_smbi = FALSE; + bool force_clear_smbi = false; DEBUGFUNC("e1000_init_mac_params_82571"); @@ -327,9 +327,9 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) /* Set rar entry count */ mac->rar_entry_count = E1000_RAR_ENTRIES; /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; + mac->asf_firmware_present = true; /* Adaptive IFS supported */ - mac->adaptive_ifs = TRUE; + mac->adaptive_ifs = true; /* Function pointers */ @@ -369,7 +369,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) mac->ops.blink_led = e1000_blink_led_generic; /* FWSM register */ - mac->has_fwsm = TRUE; + mac->has_fwsm = true; /* ARC supported; valid only if manageability features are * enabled. */ @@ -388,7 +388,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) mac->ops.blink_led = e1000_blink_led_generic; /* FWSM register */ - mac->has_fwsm = TRUE; + mac->has_fwsm = true; break; } @@ -407,13 +407,13 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) /* Only do this for the first interface on this card */ E1000_WRITE_REG(hw, E1000_SWSM2, swsm2 | E1000_SWSM2_LOCK); - force_clear_smbi = TRUE; + force_clear_smbi = true; } else { - force_clear_smbi = FALSE; + force_clear_smbi = false; } break; default: - force_clear_smbi = TRUE; + force_clear_smbi = true; break; } @@ -563,7 +563,7 @@ e1000_put_hw_semaphore_82574(struct e1000_hw *hw) /** * e1000_set_d0_lplu_state_82574 - Set Low Power Linkup D0 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D0 state according to the active flag. * LPLU will not be activated unless the @@ -593,7 +593,7 @@ static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active) * @active: boolean used to enable/disable lplu * * The low power link up (lplu) state is set to the power management level D3 - * when active is TRUE, else clear lplu for D3. LPLU + * when active is true, else clear lplu for D3. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is * maintained. @@ -860,7 +860,7 @@ static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw) /** * e1000_set_d0_lplu_state_82571 - Set Low Power Linkup D0 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D0 state according to the active flag. When activating LPLU * this function also disables smart speed and vice versa. LPLU will not be @@ -1051,7 +1051,7 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw) if (ret_val) return ret_val; - e1000_set_laa_state_82571(hw, TRUE); + e1000_set_laa_state_82571(hw, true); } /* Reinitialize the 82571 serdes link state machine */ @@ -1327,8 +1327,8 @@ static void e1000_clear_vfta_82571(struct e1000_hw *hw) * e1000_check_mng_mode_82574 - Check manageability is enabled * @hw: pointer to the HW structure * - * Reads the NVM Initialization Control Word 2 and returns TRUE - * (>0) if any manageability is enabled, else FALSE (0). + * Reads the NVM Initialization Control Word 2 and returns true + * (>0) if any manageability is enabled, else false (0). **/ static bool e1000_check_mng_mode_82574(struct e1000_hw *hw) { @@ -1339,7 +1339,7 @@ static bool e1000_check_mng_mode_82574(struct e1000_hw *hw) ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data); if (ret_val) - return FALSE; + return false; return (data & E1000_NVM_INIT_CTRL2_MNGM) != 0; } @@ -1392,18 +1392,18 @@ bool e1000_check_phy_82574(struct e1000_hw *hw) ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER, &receive_errors); if (ret_val) - return FALSE; + return false; if (receive_errors == E1000_RECEIVE_ERROR_MAX) { ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS, &status_1kbt); if (ret_val) - return FALSE; + return false; if ((status_1kbt & E1000_IDLE_ERROR_COUNT_MASK) == E1000_IDLE_ERROR_COUNT_MASK) - return TRUE; + return true; } - return FALSE; + return false; } @@ -1556,10 +1556,10 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) */ mac->serdes_link_state = e1000_serdes_link_autoneg_progress; - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("AN_UP -> AN_PROG\n"); } else { - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } break; @@ -1576,10 +1576,10 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) (ctrl & ~E1000_CTRL_SLU)); mac->serdes_link_state = e1000_serdes_link_autoneg_progress; - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("FORCED_UP -> AN_PROG\n"); } else { - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } break; @@ -1593,7 +1593,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) mac->serdes_link_state = e1000_serdes_link_autoneg_complete; DEBUGOUT("AN_PROG -> AN_UP\n"); - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } else { /* Autoneg completed, but failed. */ mac->serdes_link_state = @@ -1619,7 +1619,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) } mac->serdes_link_state = e1000_serdes_link_forced_up; - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; DEBUGOUT("AN_PROG -> FORCED_UP\n"); } break; @@ -1635,13 +1635,13 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) ~E1000_CTRL_SLU)); mac->serdes_link_state = e1000_serdes_link_autoneg_progress; - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("DOWN -> AN_PROG\n"); break; } } else { if (!(rxcw & E1000_RXCW_SYNCH)) { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; mac->serdes_link_state = e1000_serdes_link_down; DEBUGOUT("ANYSTATE -> DOWN\n"); } else { @@ -1657,7 +1657,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) continue; if (rxcw & E1000_RXCW_IV) { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; mac->serdes_link_state = e1000_serdes_link_down; DEBUGOUT("ANYSTATE -> DOWN\n"); @@ -1671,7 +1671,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) E1000_WRITE_REG(hw, E1000_TXCW, txcw); mac->serdes_link_state = e1000_serdes_link_autoneg_progress; - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("ANYSTATE -> AN_PROG\n"); } } @@ -1728,7 +1728,7 @@ bool e1000_get_laa_state_82571(struct e1000_hw *hw) DEBUGFUNC("e1000_get_laa_state_82571"); if (hw->mac.type != e1000_82571) - return FALSE; + return false; return hw->dev_spec._82571.laa_is_present; } diff --git a/sys/dev/e1000/e1000_82575.c b/sys/dev/e1000/e1000_82575.c index 29805270f8dc..59d8b9c85dc3 100644 --- a/sys/dev/e1000/e1000_82575.c +++ b/sys/dev/e1000/e1000_82575.c @@ -128,7 +128,7 @@ static const u16 e1000_82580_rxpbs_table[] = { static bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw) { u32 reg = 0; - bool ext_mdio = FALSE; + bool ext_mdio = false; DEBUGFUNC("e1000_sgmii_uses_mdio_82575"); @@ -348,16 +348,16 @@ static s32 e1000_init_mac_params_82575(struct e1000_hw *hw) /* Enable EEE default settings for EEE supported devices */ if (mac->type >= e1000_i350) - dev_spec->eee_disable = FALSE; + dev_spec->eee_disable = false; /* Allow a single clear of the SW semaphore on I210 and newer */ if (mac->type >= e1000_i210) - dev_spec->clear_semaphore_once = TRUE; + dev_spec->clear_semaphore_once = true; /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; + mac->asf_firmware_present = true; /* FWSM register */ - mac->has_fwsm = TRUE; + mac->has_fwsm = true; /* ARC supported; valid only if manageability features are enabled. */ mac->arc_subsystem_valid = !!(E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK); @@ -716,7 +716,7 @@ static s32 e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw) DEBUGFUNC("e1000_phy_hw_reset_sgmii_82575"); /* - * This isn't a TRUE "hard" reset, but is the only reset + * This isn't a true "hard" reset, but is the only reset * available to us at this time. */ @@ -746,7 +746,7 @@ out: /** * e1000_set_d0_lplu_state_82575 - Set Low Power Linkup D0 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D0 state according to the active flag. When * activating LPLU this function also disables smart speed @@ -832,7 +832,7 @@ out: /** * e1000_set_d0_lplu_state_82580 - Set Low Power Linkup D0 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D0 state according to the active flag. When * activating LPLU this function also disables smart speed @@ -883,7 +883,7 @@ static s32 e1000_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active) * Success returns 0, Failure returns 1 * * The low power link up (lplu) state is set to the power management level D3 - * and SmartSpeed is disabled when active is TRUE, else clear lplu for D3 + * and SmartSpeed is disabled when active is true, else clear lplu for D3 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is @@ -1139,7 +1139,7 @@ static s32 e1000_check_for_link_media_swap(struct e1000_hw *hw) /* Determine if a swap needs to happen. */ if (port && (hw->dev_spec._82575.media_port != port)) { hw->dev_spec._82575.media_port = port; - hw->dev_spec._82575.media_changed = TRUE; + hw->dev_spec._82575.media_changed = true; } if (port == E1000_MEDIA_PORT_COPPER) { @@ -1217,7 +1217,7 @@ static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, * The link up bit determines when link is up on autoneg. */ if (pcs & E1000_PCS_LSTS_LINK_OK) { - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; /* Detect and store PCS speed */ if (pcs & E1000_PCS_LSTS_SPEED_1000) @@ -1246,7 +1246,7 @@ static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, } } else { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; *speed = 0; *duplex = 0; } @@ -1527,13 +1527,13 @@ static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw) switch (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) { case E1000_CTRL_EXT_LINK_MODE_SGMII: /* sgmii mode lets the phy handle forcing speed/duplex */ - pcs_autoneg = TRUE; + pcs_autoneg = true; /* autoneg time out should be disabled for SGMII mode */ reg &= ~(E1000_PCS_LCTL_AN_TIMEOUT); break; case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX: /* disable PCS autoneg and support parallel detect only */ - pcs_autoneg = FALSE; + pcs_autoneg = false; /* FALLTHROUGH */ default: if (hw->mac.type == e1000_82575 || @@ -1545,7 +1545,7 @@ static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw) } if (data & E1000_EEPROM_PCS_AUTONEG_DISABLE_BIT) - pcs_autoneg = FALSE; + pcs_autoneg = false; } /* @@ -1637,8 +1637,8 @@ static s32 e1000_get_media_type_82575(struct e1000_hw *hw) u32 link_mode = 0; /* Set internal phy as default */ - dev_spec->sgmii_active = FALSE; - dev_spec->module_plugged = FALSE; + dev_spec->sgmii_active = false; + dev_spec->module_plugged = false; /* Get CSR setting */ ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); @@ -1657,7 +1657,7 @@ static s32 e1000_get_media_type_82575(struct e1000_hw *hw) /* Get phy control interface type set (MDIO vs. I2C)*/ if (e1000_sgmii_uses_mdio_82575(hw)) { hw->phy.media_type = e1000_media_type_copper; - dev_spec->sgmii_active = TRUE; + dev_spec->sgmii_active = true; break; } /* fall through for I2C based SGMII */ @@ -1675,7 +1675,7 @@ static s32 e1000_get_media_type_82575(struct e1000_hw *hw) if (link_mode == E1000_CTRL_EXT_LINK_MODE_SGMII) { hw->phy.media_type = e1000_media_type_copper; - dev_spec->sgmii_active = TRUE; + dev_spec->sgmii_active = true; } break; @@ -1746,14 +1746,14 @@ static s32 e1000_set_sfp_media_type_82575(struct e1000_hw *hw) /* Check if there is some SFP module plugged and powered */ if ((tranceiver_type == E1000_SFF_IDENTIFIER_SFP) || (tranceiver_type == E1000_SFF_IDENTIFIER_SFF)) { - dev_spec->module_plugged = TRUE; + dev_spec->module_plugged = true; if (eth_flags->e1000_base_lx || eth_flags->e1000_base_sx) { hw->phy.media_type = e1000_media_type_internal_serdes; } else if (eth_flags->e100_base_fx) { - dev_spec->sgmii_active = TRUE; + dev_spec->sgmii_active = true; hw->phy.media_type = e1000_media_type_internal_serdes; } else if (eth_flags->e1000_base_t) { - dev_spec->sgmii_active = TRUE; + dev_spec->sgmii_active = true; hw->phy.media_type = e1000_media_type_copper; } else { hw->phy.media_type = e1000_media_type_unknown; @@ -2224,11 +2224,11 @@ static s32 e1000_reset_hw_82580(struct e1000_hw *hw) DEBUGFUNC("e1000_reset_hw_82580"); - hw->dev_spec._82575.global_device_reset = FALSE; + hw->dev_spec._82575.global_device_reset = false; /* 82580 does not reliably do global_device_reset due to hw errata */ if (hw->mac.type == e1000_82580) - global_device_reset = FALSE; + global_device_reset = false; /* Get current control state. */ ctrl = E1000_READ_REG(hw, E1000_CTRL); @@ -2252,7 +2252,7 @@ static s32 e1000_reset_hw_82580(struct e1000_hw *hw) /* Determine whether or not a global dev reset is requested */ if (global_device_reset && hw->mac.ops.acquire_swfw_sync(hw, swmbsw_mask)) - global_device_reset = FALSE; + global_device_reset = false; if (global_device_reset && !(E1000_READ_REG(hw, E1000_STATUS) & E1000_STAT_DEV_RST_SET)) @@ -2572,7 +2572,7 @@ s32 e1000_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data) { DEBUGFUNC("e1000_read_emi_reg"); - return __e1000_access_emi_reg(hw, addr, data, TRUE); + return __e1000_access_emi_reg(hw, addr, data, true); } /** @@ -2930,7 +2930,7 @@ s32 e1000_get_eee_status_i354(struct e1000_hw *hw, bool *status) goto out; *status = phy_data & (E1000_PCS_STATUS_TX_LPI_RCVD | - E1000_PCS_STATUS_RX_LPI_RCVD) ? TRUE : FALSE; + E1000_PCS_STATUS_RX_LPI_RCVD) ? true : false; out: return ret_val; @@ -3032,7 +3032,7 @@ s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset, u32 retry = 1; u16 swfw_mask = 0; - bool nack = TRUE; + bool nack = true; DEBUGFUNC("e1000_read_i2c_byte_generic"); @@ -3299,7 +3299,7 @@ static s32 e1000_get_i2c_ack(struct e1000_hw *hw) u32 i = 0; u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); u32 timeout = 10; - bool ack = TRUE; + bool ack = true; DEBUGFUNC("e1000_get_i2c_ack"); diff --git a/sys/dev/e1000/e1000_api.c b/sys/dev/e1000/e1000_api.c index b28ab77f3794..5c778a48bba0 100644 --- a/sys/dev/e1000/e1000_api.c +++ b/sys/dev/e1000/e1000_api.c @@ -421,10 +421,10 @@ s32 e1000_set_mac_type(struct e1000_hw *hw) /** * e1000_setup_init_funcs - Initializes function pointers * @hw: pointer to the HW structure - * @init_device: TRUE will initialize the rest of the function pointers - * getting the device ready for use. FALSE will only set + * @init_device: true will initialize the rest of the function pointers + * getting the device ready for use. false will only set * MAC type and the function pointers for the other init - * functions. Passing FALSE will not generate any hardware + * functions. Passing false will not generate any hardware * reads or writes. * * This function must be called by a driver in order to use the rest @@ -656,7 +656,7 @@ bool e1000_check_mng_mode(struct e1000_hw *hw) if (hw->mac.ops.check_mng_mode) return hw->mac.ops.check_mng_mode(hw); - return FALSE; + return false; } /** @@ -1186,7 +1186,7 @@ s32 e1000_phy_commit(struct e1000_hw *hw) * Success returns 0, Failure returns 1 * * The low power link up (lplu) state is set to the power management level D0 - * and SmartSpeed is disabled when active is TRUE, else clear lplu for D0 + * and SmartSpeed is disabled when active is true, else clear lplu for D0 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is @@ -1208,7 +1208,7 @@ s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active) * Success returns 0, Failure returns 1 * * The low power link up (lplu) state is set to the power management level D3 - * and SmartSpeed is disabled when active is TRUE, else clear lplu for D3 + * and SmartSpeed is disabled when active is true, else clear lplu for D3 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is diff --git a/sys/dev/e1000/e1000_api.h b/sys/dev/e1000/e1000_api.h index c96030b567db..48cf33213043 100644 --- a/sys/dev/e1000/e1000_api.h +++ b/sys/dev/e1000/e1000_api.h @@ -140,11 +140,11 @@ u32 e1000_translate_register_82542(u32 reg); * Typical use: * ... * if (TBI_ACCEPT) { - * accept_frame = TRUE; + * accept_frame = true; * e1000_tbi_adjust_stats(adapter, MacAddress); * frame_length--; * } else { - * accept_frame = FALSE; + * accept_frame = false; * } * ... */ diff --git a/sys/dev/e1000/e1000_hw.h b/sys/dev/e1000/e1000_hw.h index 90bc652861b5..6ee252e147a4 100644 --- a/sys/dev/e1000/e1000_hw.h +++ b/sys/dev/e1000/e1000_hw.h @@ -275,7 +275,7 @@ enum e1000_mac_type { e1000_i211, e1000_vfadapt, e1000_vfadapt_i350, - e1000_num_macs /* List is 1-based, so subtract 1 for TRUE count. */ + e1000_num_macs /* List is 1-based, so subtract 1 for true count. */ }; enum e1000_media_type { diff --git a/sys/dev/e1000/e1000_i210.c b/sys/dev/e1000/e1000_i210.c index 0d810fecf3bd..da2e786130c8 100644 --- a/sys/dev/e1000/e1000_i210.c +++ b/sys/dev/e1000/e1000_i210.c @@ -552,14 +552,14 @@ out: bool e1000_get_flash_presence_i210(struct e1000_hw *hw) { u32 eec = 0; - bool ret_val = FALSE; + bool ret_val = false; DEBUGFUNC("e1000_get_flash_presence_i210"); eec = E1000_READ_REG(hw, E1000_EECD); if (eec & E1000_EECD_FLASH_DETECTED_I210) - ret_val = TRUE; + ret_val = true; return ret_val; } diff --git a/sys/dev/e1000/e1000_ich8lan.c b/sys/dev/e1000/e1000_ich8lan.c index dd4e85d64aff..5cd13579d50c 100644 --- a/sys/dev/e1000/e1000_ich8lan.c +++ b/sys/dev/e1000/e1000_ich8lan.c @@ -242,7 +242,7 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw) } if (ret_val) - return FALSE; + return false; out: if (hw->mac.type >= e1000_pch_lpt) { /* Only unforce SMBus if ME is not active */ @@ -260,7 +260,7 @@ out: } } - return TRUE; + return true; } /** @@ -324,7 +324,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) /* Gate automatic PHY configuration by hardware on managed and * non-managed 82579 and newer adapters. */ - e1000_gate_hw_phy_config_ich8lan(hw, TRUE); + e1000_gate_hw_phy_config_ich8lan(hw, true); /* It is not possible to be certain of the current state of ULP * so forcibly disable it. @@ -439,7 +439,7 @@ out: if ((hw->mac.type == e1000_pch2lan) && !(fwsm & E1000_ICH_FWSM_FW_VALID)) { msec_delay(10); - e1000_gate_hw_phy_config_ich8lan(hw, FALSE); + e1000_gate_hw_phy_config_ich8lan(hw, false); } return ret_val; @@ -699,7 +699,7 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw) /* Clear shadow ram */ for (i = 0; i < nvm->word_size; i++) { - dev_spec->shadow_ram[i].modified = FALSE; + dev_spec->shadow_ram[i].modified = false; dev_spec->shadow_ram[i].value = 0xFFFF; } @@ -743,13 +743,13 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) if (mac->type == e1000_ich8lan) mac->rar_entry_count--; /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; + mac->asf_firmware_present = true; /* FWSM register */ - mac->has_fwsm = TRUE; + mac->has_fwsm = true; /* ARC subsystem not supported */ - mac->arc_subsystem_valid = FALSE; + mac->arc_subsystem_valid = false; /* Adaptive IFS supported */ - mac->adaptive_ifs = TRUE; + mac->adaptive_ifs = true; /* Function pointers */ @@ -833,7 +833,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) /* Enable PCS Lock-loss workaround for ICH8 */ if (mac->type == e1000_ich8lan) - e1000_set_kmrn_lock_loss_workaround_ich8lan(hw, TRUE); + e1000_set_kmrn_lock_loss_workaround_ich8lan(hw, true); return E1000_SUCCESS; } @@ -880,7 +880,7 @@ s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data) { DEBUGFUNC("e1000_read_emi_reg_locked"); - return __e1000_access_emi_reg_locked(hw, addr, data, TRUE); + return __e1000_access_emi_reg_locked(hw, addr, data, true); } /** @@ -895,7 +895,7 @@ s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data) { DEBUGFUNC("e1000_read_emi_reg_locked"); - return __e1000_access_emi_reg_locked(hw, addr, &data, FALSE); + return __e1000_access_emi_reg_locked(hw, addr, &data, false); } /** @@ -1112,7 +1112,7 @@ static u64 e1000_ltr2ns(u16 ltr) * GbE MAC in the Lynx Point PCH based on Rx buffer size and link speed * when link is up (which must not exceed the maximum latency supported * by the platform), otherwise specify there is no LTR requirement. - * Unlike TRUE-PCIe devices which set the LTR maximum snoop/no-snoop + * Unlike true-PCIe devices which set the LTR maximum snoop/no-snoop * latencies in the LTR Extended Capability Structure in the PCIe Extended * Capability register set, on this device LTR is set by writing the * equivalent snoop/no-snoop latencies in the LTRV register in the MAC and @@ -1410,8 +1410,8 @@ out: * If not on an ME enabled system, un-configure the ULP mode by software. * * During nominal operation, this function is called when link is acquired - * to disable ULP mode (force=FALSE); otherwise, for example when unloading - * the driver or during Sx->S0 transitions, this is called with force=TRUE + * to disable ULP mode (force=false); otherwise, for example when unloading + * the driver or during Sx->S0 transitions, this is called with force=true * to forcibly disable ULP. */ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force) @@ -1745,7 +1745,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE; } - if (hw->dev_spec.ich8lan.disable_k1_off == TRUE) + if (hw->dev_spec.ich8lan.disable_k1_off == true) fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE; E1000_WRITE_REG(hw, E1000_FEXTNVM6, fextnvm6); @@ -1754,7 +1754,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) if (!link) return E1000_SUCCESS; /* No link detected */ - mac->get_link_status = FALSE; + mac->get_link_status = false; switch (hw->mac.type) { case e1000_pch2lan: @@ -2209,7 +2209,7 @@ release: static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw) { u32 fwsm; - bool blocked = FALSE; + bool blocked = false; int i = 0; DEBUGFUNC("e1000_check_reset_block_ich8lan"); @@ -2217,11 +2217,11 @@ static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw) do { fwsm = E1000_READ_REG(hw, E1000_FWSM); if (!(fwsm & E1000_ICH_FWSM_RSPCIPHY)) { - blocked = TRUE; + blocked = true; msec_delay(10); continue; } - blocked = FALSE; + blocked = false; } while (blocked && (i++ < 30)); return blocked ? E1000_BLK_PHY_RESET : E1000_SUCCESS; } @@ -2435,7 +2435,7 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link) if (status_reg == (BM_CS_STATUS_LINK_UP | BM_CS_STATUS_RESOLVED | BM_CS_STATUS_SPEED_1000)) - k1_enable = FALSE; + k1_enable = false; } if (hw->phy.type == e1000_phy_82577) { @@ -2451,7 +2451,7 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link) if (status_reg == (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE | HV_M_STATUS_SPEED_1000)) - k1_enable = FALSE; + k1_enable = false; } /* Link stall fix for link up */ @@ -2688,7 +2688,7 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) /* Configure the K1 Si workaround during phy reset assuming there is * link so that it disables K1 if link is in 1Gbps. */ - ret_val = e1000_k1_gig_workaround_hv(hw, TRUE); + ret_val = e1000_k1_gig_workaround_hv(hw, true); if (ret_val) return ret_val; @@ -3033,7 +3033,7 @@ static s32 e1000_k1_workaround_lv(struct e1000_hw *hw) /** * e1000_gate_hw_phy_config_ich8lan - disable PHY config via hardware * @hw: pointer to the HW structure - * @gate: boolean set to TRUE to gate, FALSE to ungate + * @gate: boolean set to true to gate, false to ungate * * Gate/ungate the automatic PHY configuration via hardware; perform * the configuration via software instead. @@ -3136,14 +3136,14 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw) return ret_val; /* Configure the LCD with the OEM bits in NVM */ - ret_val = e1000_oem_bits_config_ich8lan(hw, TRUE); + ret_val = e1000_oem_bits_config_ich8lan(hw, true); if (hw->mac.type == e1000_pch2lan) { /* Ungate automatic PHY configuration on non-managed 82579 */ if (!(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID)) { msec_delay(10); - e1000_gate_hw_phy_config_ich8lan(hw, FALSE); + e1000_gate_hw_phy_config_ich8lan(hw, false); } *** 1091 LINES SKIPPED ***