Date: Wed, 2 Oct 2019 09:12:53 +0000 (UTC) From: Hans Petter Selasky <hselasky@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r352958 - head/sys/dev/mlx5/mlx5_core Message-ID: <201910020912.x929CrR6098348@repo.freebsd.org>
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Author: hselasky Date: Wed Oct 2 09:12:53 2019 New Revision: 352958 URL: https://svnweb.freebsd.org/changeset/base/352958 Log: Make sure the number of IRQ vectors doesn't exceed 256 in mlx5core. The "intr" field in "struct mlx5_ifc_eqc_bits" is only 8 bits wide. MFC after: 3 days Sponsored by: Mellanox Technologies Modified: head/sys/dev/mlx5/mlx5_core/mlx5_main.c Modified: head/sys/dev/mlx5/mlx5_core/mlx5_main.c ============================================================================== --- head/sys/dev/mlx5/mlx5_core/mlx5_main.c Wed Oct 2 09:11:01 2019 (r352957) +++ head/sys/dev/mlx5/mlx5_core/mlx5_main.c Wed Oct 2 09:12:53 2019 (r352958) @@ -275,7 +275,10 @@ static int mlx5_enable_msix(struct mlx5_core_dev *dev) else nvec += MLX5_CAP_GEN(dev, num_ports) * num_online_cpus(); - nvec = min_t(int, nvec, num_eqs); + if (nvec > num_eqs) + nvec = num_eqs; + if (nvec > 256) + nvec = 256; /* limit of firmware API */ if (nvec <= MLX5_EQ_VEC_COMP_BASE) return -ENOMEM;
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