Date: Thu, 11 Sep 2003 15:22:47 -0700 (PDT) From: Peter Wemm <peter@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 37938 for review Message-ID: <200309112222.h8BMMlFc049031@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=37938 Change 37938 by peter@peter_work on 2003/09/11 15:22:44 another SMP sweep Affected files ... .. //depot/projects/hammer/sys/amd64/amd64/cpu_switch.S#8 edit .. //depot/projects/hammer/sys/amd64/amd64/db_interface.c#9 edit .. //depot/projects/hammer/sys/amd64/amd64/machdep.c#50 edit .. //depot/projects/hammer/sys/amd64/amd64/mem.c#10 edit .. //depot/projects/hammer/sys/amd64/amd64/support.S#11 edit .. //depot/projects/hammer/sys/amd64/amd64/trap.c#27 edit .. //depot/projects/hammer/sys/amd64/amd64/tsc.c#7 edit .. //depot/projects/hammer/sys/amd64/include/pmap.h#18 edit Differences ... ==== //depot/projects/hammer/sys/amd64/amd64/cpu_switch.S#8 (text+ko) ==== @@ -65,6 +65,9 @@ /* release bit from old pm_active */ movq TD_PROC(%rdi), %rdx /* oldtd->td_proc */ movq P_VMSPACE(%rdx), %rdx /* proc->p_vmspace */ +#ifdef SMP + lock +#endif btrq %rax, VM_PMAP+PM_ACTIVE(%rdx) /* clear old */ 1: movq TD_PCB(%rsi),%rdx /* newtd->td_proc */ @@ -73,6 +76,9 @@ /* set bit in new pm_active */ movq TD_PROC(%rsi),%rdx movq P_VMSPACE(%rdx), %rdx +#ifdef SMP + lock +#endif btsq %rax, VM_PMAP+PM_ACTIVE(%rdx) /* set new */ jmp sw1 @@ -152,11 +158,17 @@ /* Release bit from old pmap->pm_active */ movq TD_PROC(%rdi), %rdx /* oldproc */ movq P_VMSPACE(%rdx), %rdx +#ifdef SMP + lock +#endif btrq %rax, VM_PMAP+PM_ACTIVE(%rdx) /* clear old */ /* Set bit in new pmap->pm_active */ movq TD_PROC(%rsi),%rdx /* newproc */ movq P_VMSPACE(%rdx), %rdx +#ifdef SMP + lock +#endif btsq %rax, VM_PMAP+PM_ACTIVE(%rdx) /* set new */ sw1: ==== //depot/projects/hammer/sys/amd64/amd64/db_interface.c#9 (text+ko) ==== @@ -98,6 +98,24 @@ ef = read_rflags(); disable_intr(); +#ifdef SMP +#ifdef CPUSTOP_ON_DDBBREAK + +#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK) + db_printf("\nCPU%d stopping CPUs: 0x%08x...", PCPU_GET(cpuid), + PCPU_GET(other_cpus)); +#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */ + + /* We stop all CPUs except ourselves (obviously) */ + stop_cpus(PCPU_GET(other_cpus)); + +#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK) + db_printf(" stopped.\n"); +#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */ + +#endif /* CPUSTOP_ON_DDBBREAK */ +#endif /* SMP */ + switch (type) { case T_BPTFLT: /* breakpoint */ case T_TRCTRAP: /* debug exception */ @@ -192,6 +210,28 @@ regs->tf_ds = ddb_regs.tf_ds & 0xffff; #endif +#ifdef SMP +#ifdef CPUSTOP_ON_DDBBREAK + +#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK) + db_printf("\nCPU%d restarting CPUs: 0x%08x...", PCPU_GET(cpuid), + stopped_cpus); +#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */ + + /* Restart all the CPUs we previously stopped */ + if (stopped_cpus != PCPU_GET(other_cpus) && smp_started != 0) { + db_printf("whoa, other_cpus: 0x%08x, stopped_cpus: 0x%08x\n", + PCPU_GET(other_cpus), stopped_cpus); + panic("stop_cpus() failed"); + } + restart_cpus(stopped_cpus); + +#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK) + db_printf(" restarted.\n"); +#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */ + +#endif /* CPUSTOP_ON_DDBBREAK */ +#endif /* SMP */ write_rflags(ef); return (1); ==== //depot/projects/hammer/sys/amd64/amd64/machdep.c#50 (text+ko) ==== @@ -144,7 +144,7 @@ struct kva_md_info kmi; static struct trapframe proc0_tf; -static struct pcpu __pcpu; +static struct pcpu __pcpu; /* BSP pcpu data space */ struct mtx icu_lock; @@ -463,6 +463,11 @@ cpu_idle(void) { +#ifdef SMP + if (mp_grab_cpu_hlt()) + return; +#endif + if (cpu_idle_hlt) { disable_intr(); if (sched_runnable()) { ==== //depot/projects/hammer/sys/amd64/amd64/mem.c#10 (text+ko) ==== @@ -323,6 +323,15 @@ return (mem_range_softc.mr_op->set(&mem_range_softc, mrd, arg)); } +#ifdef SMP +void +mem_range_AP_init(void) +{ + if (mem_range_softc.mr_op && mem_range_softc.mr_op->initAP) + (mem_range_softc.mr_op->initAP(&mem_range_softc)); +} +#endif + static int mem_modevent(module_t mod, int type, void *data) { ==== //depot/projects/hammer/sys/amd64/amd64/support.S#11 (text+ko) ==== @@ -340,6 +340,9 @@ ja fusufault movq %rsi, %rax /* old */ +#ifdef SMP + lock +#endif cmpxchgq %rdx, (%rdi) /* new = %rdx */ /* ==== //depot/projects/hammer/sys/amd64/amd64/trap.c#27 (text+ko) ==== @@ -82,6 +82,9 @@ #include <machine/intr_machdep.h> #include <machine/md_var.h> #include <machine/pcb.h> +#ifdef SMP +#include <machine/smp.h> +#endif #include <machine/tss.h> #include <ddb/ddb.h> @@ -569,6 +572,11 @@ printf("\n\nFatal trap %d: %s while in %s mode\n", type, trap_msg[type], ISPL(frame->tf_cs) == SEL_UPL ? "user" : "kernel"); +#ifdef SMP + /* two separate prints in case of a trap on an unmapped page */ + printf("cpuid = %d; ", PCPU_GET(cpuid)); + printf("apic id = %02x\n", PCPU_GET(apic_id)); +#endif if (type == T_PAGEFLT) { printf("fault virtual address = 0x%lx\n", eva); printf("fault code = %s %s, %s\n", @@ -636,6 +644,11 @@ dblfault_handler() { printf("\nFatal double fault\n"); +#ifdef SMP + /* two separate prints in case of a trap on an unmapped page */ + printf("cpuid = %d; ", PCPU_GET(cpuid)); + printf("apic id = %02x\n", PCPU_GET(apic_id)); +#endif panic("double fault"); } ==== //depot/projects/hammer/sys/amd64/amd64/tsc.c#7 (text+ko) ==== @@ -43,7 +43,6 @@ uint64_t tsc_freq; int tsc_is_broken; -u_int tsc_present = 1; #ifdef SMP static int smp_tsc; @@ -59,7 +58,8 @@ 0, /* no poll_pps */ ~0u, /* counter_mask */ 0, /* frequency */ - "TSC" /* name */ + "TSC", /* name */ + 800, /* quality (adjusted in code) */ }; void @@ -77,13 +77,30 @@ tsc_freq = tscval[1] - tscval[0]; if (bootverbose) printf("TSC clock: %lu Hz\n", tsc_freq); +} + +void +init_TSC_tc(void) +{ + +#ifdef SMP + /* + * We can not use the TSC in SMP mode unless the TSCs on all CPUs + * are somehow synchronized. Some hardware configurations do + * this, but we have no way of determining whether this is the + * case, so we do not use the TSC in multi-processor systems + * unless the user indicated (by setting kern.timecounter.smp_tsc + * to 1) that he believes that his TSCs are synchronized. + */ + if (mp_ncpus > 1 && !smp_tsc) + tsc_timecounter.tc_quality = -100; +#endif + if (tsc_freq != 0 && !tsc_is_broken) { tsc_timecounter.tc_frequency = tsc_freq; tc_init(&tsc_timecounter); } - - return; } static int ==== //depot/projects/hammer/sys/amd64/include/pmap.h#18 (text+ko) ====
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