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Date:      Wed, 7 Jul 2010 14:21:40 +0000 (UTC)
From:      Nathan Whitehorn <nwhitehorn@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org
Subject:   svn commit: r209767 - stable/8/sys/powerpc/aim
Message-ID:  <201007071421.o67ELepC014700@svn.freebsd.org>
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Author: nwhitehorn
Date: Wed Jul  7 14:21:40 2010
New Revision: 209767
URL: http://svn.freebsd.org/changeset/base/209767

Log:
  MFC r209114:
  Make SMP work on MPC7400-based Apple desktops like the PowerMac3,3.

Modified:
  stable/8/sys/powerpc/aim/mp_cpudep.c
  stable/8/sys/powerpc/aim/platform_chrp.c
Directory Properties:
  stable/8/sys/   (props changed)
  stable/8/sys/amd64/include/xen/   (props changed)
  stable/8/sys/cddl/contrib/opensolaris/   (props changed)
  stable/8/sys/contrib/dev/acpica/   (props changed)
  stable/8/sys/contrib/pf/   (props changed)
  stable/8/sys/dev/xen/xenpci/   (props changed)

Modified: stable/8/sys/powerpc/aim/mp_cpudep.c
==============================================================================
--- stable/8/sys/powerpc/aim/mp_cpudep.c	Wed Jul  7 14:19:58 2010	(r209766)
+++ stable/8/sys/powerpc/aim/mp_cpudep.c	Wed Jul  7 14:21:40 2010	(r209767)
@@ -75,9 +75,21 @@ cpudep_ap_bootstrap(void)
 }
 
 static register_t
-mpc745x_l2_enable(register_t l2cr_config)
+mpc74xx_l2_enable(register_t l2cr_config)
 {
-	register_t ccr;
+	register_t ccr, bit;
+	uint16_t	vers;
+
+	vers = mfpvr() >> 16;
+	switch (vers) {
+	case MPC7400:
+	case MPC7410:
+		bit = L2CR_L2IP;
+		break;
+	default:
+		bit = L2CR_L2I;
+		break;
+	}
 
 	ccr = mfspr(SPR_L2CR);
 	if (ccr & L2CR_L2E)
@@ -88,7 +100,7 @@ mpc745x_l2_enable(register_t l2cr_config
 	mtspr(SPR_L2CR, ccr | L2CR_L2I);
 	do {
 		ccr = mfspr(SPR_L2CR);
-	} while (ccr & L2CR_L2I);
+	} while (ccr & bit);
 	powerpc_sync();
 	mtspr(SPR_L2CR, l2cr_config);
 	powerpc_sync();
@@ -129,7 +141,7 @@ mpc745x_l3_enable(register_t l3cr_config
 }
 
 static register_t
-mpc745x_l1d_enable(void)
+mpc74xx_l1d_enable(void)
 {
 	register_t hid;
 
@@ -147,7 +159,7 @@ mpc745x_l1d_enable(void)
 }
 
 static register_t
-mpc745x_l1i_enable(void)
+mpc74xx_l1i_enable(void)
 {
 	register_t hid;
 
@@ -267,9 +279,9 @@ cpudep_ap_setup()
 		mtspr(SPR_HID0, bsp_state[0]); isync();
 		mtspr(SPR_HID1, bsp_state[1]); isync();
 
-		reg = mpc745x_l2_enable(bsp_state[2]);
-		reg = mpc745x_l1d_enable();
-		reg = mpc745x_l1i_enable();
+		reg = mpc74xx_l2_enable(bsp_state[2]);
+		reg = mpc74xx_l1d_enable();
+		reg = mpc74xx_l1i_enable();
 
 		break;
 	default:

Modified: stable/8/sys/powerpc/aim/platform_chrp.c
==============================================================================
--- stable/8/sys/powerpc/aim/platform_chrp.c	Wed Jul  7 14:19:58 2010	(r209766)
+++ stable/8/sys/powerpc/aim/platform_chrp.c	Wed Jul  7 14:21:40 2010	(r209767)
@@ -228,8 +228,26 @@ chrp_smp_start_cpu(platform_t plat, stru
 
 	cpu = pc->pc_hwref;
 	res = OF_getprop(cpu, "soft-reset", &reset, sizeof(reset));
-	if (res < 0)
-		return (ENXIO);
+	if (res < 0) {
+		reset = 0x58;
+
+		switch (pc->pc_cpuid) {
+		case 0:
+			reset += 0x03;
+			break;
+		case 1:
+			reset += 0x04;
+			break;
+		case 2:
+			reset += 0x0f;
+			break;
+		case 4:
+			reset += 0x10;
+			break;
+		default:
+			return (ENXIO);
+		}
+	}
 
 	ap_pcpu = pc;
 
@@ -239,10 +257,12 @@ chrp_smp_start_cpu(platform_t plat, stru
 	rstvec = rstvec_virtbase + reset;
 
 	*rstvec = 4;
+	powerpc_sync();
 	(void)(*rstvec);
 	powerpc_sync();
 	DELAY(1);
 	*rstvec = 0;
+	powerpc_sync();
 	(void)(*rstvec);
 	powerpc_sync();

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