Date: Tue, 13 May 2014 07:30:08 -0600 From: Ian Lepore <ian@FreeBSD.org> To: "Sulev-Madis Silber (ketas)" <madis555@hot.ee> Cc: freebsd-arm <freebsd-arm@FreeBSD.org> Subject: Re: Patch to make BBB properly boot from eMMC every time Message-ID: <1399987808.56626.2.camel@revolution.hippie.lan> In-Reply-To: <5371E1F3.6080002@hot.ee> References: <5371E1F3.6080002@hot.ee>
next in thread | previous in thread | raw e-mail | index | archive | help
On Tue, 2014-05-13 at 12:12 +0300, Sulev-Madis Silber (ketas) wrote: > On my BBB, I need following patch to boot from eMMC 100% of cases. > Without that, device is detected with 1 / 4 bit bus (it's actually 8 > bit) or not at all (then boot fails). > > Actually, that code looks like weird way to implement sleep(), or at > least it has such (side) effect. > > Actually ian@ made that patch, and was confused about results. > > > ------------------------------------------------------------------------- > Index: sys/dev/mmc/mmc.c > =================================================================== > --- sys/dev/mmc/mmc.c (revision 264141) > +++ sys/dev/mmc/mmc.c (working copy) > @@ -769,8 +769,10 @@ mmc_test_bus_width(struct mmc_softc *sc) > data.data = p8; > data.len = 8; > data.flags = MMC_DATA_WRITE; > - mmc_wait_for_cmd(sc, &cmd, 0); > - > + err = mmc_wait_for_cmd(sc, &cmd, 0); > + if (err != 0) > + device_printf(sc->dev, "BUSTEST_W err %d\n", err); > + > memset(&cmd, 0, sizeof(cmd)); > memset(&data, 0, sizeof(data)); > cmd.opcode = MMC_BUSTEST_R; > @@ -782,7 +784,12 @@ mmc_test_bus_width(struct mmc_softc *sc) > data.len = 8; > data.flags = MMC_DATA_READ; > err = mmc_wait_for_cmd(sc, &cmd, 0); > - > + if (err != 0) > + device_printf(sc->dev, "BUSTEST_R err %d\n", err); > + > + device_printf(sc->dev, "read %02x %02x %02x %02x %02x > %02x %02x %02x\n", > + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], > buf[6], buf[7]); > + > mmcbr_set_bus_width(sc->dev, bus_width_1); > mmcbr_update_ios(sc->dev); > ------------------------------------------------------------------------- Confused about the cause of the results, yes. I think the printf I had you add to help me figure out the problem just changed the timing of the retry to make it work on the second try, but I have no idea why. Does anybody else with a BBB see the device randomly boot up as 1 or 4 or 8 bits, changing from one boot to the next? The bits are reported in the mmcsd0 line: mmcsd0: 8GB <SDHC SA08G 0.4 SN 2630755555 MFG 10/2009 by 2 TM> at mmc0 50.0MHz/4bit/65535-block That's from a wandboard, but a BBB eMMC should always be 8 bits. -- Ian
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?1399987808.56626.2.camel>