From owner-svn-src-head@FreeBSD.ORG Tue Nov 18 03:26:53 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 039E7349; Tue, 18 Nov 2014 03:26:53 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id CB2D61CC; Tue, 18 Nov 2014 03:26:52 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id sAI3QqZD055657; Tue, 18 Nov 2014 03:26:52 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id sAI3Qq6h055656; Tue, 18 Nov 2014 03:26:52 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201411180326.sAI3Qq6h055656@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Tue, 18 Nov 2014 03:26:52 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r274644 - head/sys/arm/ti X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Nov 2014 03:26:53 -0000 Author: ian Date: Tue Nov 18 03:26:52 2014 New Revision: 274644 URL: https://svnweb.freebsd.org/changeset/base/274644 Log: Fix the i2c bus speed divisors for TI OMAP4 and AM335x. For OMAP4, the old values for 1MHz gave a bus frequency of about 890KHz. The new numbers hit 1MHz exactly. For AM335x the prescaler values are adjusted to give a 24MHz clock for all 3 standard speeds, as the manual recommends (as near as we can tell, there are errors and typos apparent in the document). Also, 1MHz speed is added, and has been tested successfully on a BeagleboneWhite board. PR: 195009 Modified: head/sys/arm/ti/ti_i2c.c Modified: head/sys/arm/ti/ti_i2c.c ============================================================================== --- head/sys/arm/ti/ti_i2c.c Tue Nov 18 02:41:35 2014 (r274643) +++ head/sys/arm/ti/ti_i2c.c Tue Nov 18 03:26:52 2014 (r274644) @@ -111,10 +111,15 @@ struct ti_i2c_clock_config }; #if defined(SOC_OMAP4) +/* + * OMAP4 i2c bus clock is 96MHz / ((psc + 1) * (scll + 7 + sclh + 5)). + * The prescaler values for 100KHz and 400KHz modes come from the table in the + * OMAP4 TRM. The table doesn't list 1MHz; these values should give that speed. + */ static struct ti_i2c_clock_config ti_omap4_i2c_clock_configs[] = { { 100000, 23, 13, 15, 0, 0}, { 400000, 9, 5, 7, 0, 0}, - { 1000000, 5, 3, 4, 0, 0}, + { 1000000, 5, 1, 3, 0, 0}, /* { 3200000, 1, 113, 115, 7, 10}, - HS mode */ { 0 /* Table terminator */ } }; @@ -122,12 +127,13 @@ static struct ti_i2c_clock_config ti_oma #if defined(SOC_TI_AM335X) /* - * AM335X doesn't support HS mode. For 100kHz I2C clock set the internal - * clock to 12Mhz, for 400kHz I2C clock set the internal clock to 24Mhz. + * AM335x i2c bus clock is 48MHZ / ((psc + 1) * (scll + 7 + sclh + 5)) + * In all cases we prescale the clock to 24MHz as recommended in the manual. */ static struct ti_i2c_clock_config ti_am335x_i2c_clock_configs[] = { - { 100000, 7, 59, 61, 0, 0}, - { 400000, 3, 23, 25, 0, 0}, + { 100000, 1, 111, 117, 0, 0}, + { 400000, 1, 23, 25, 0, 0}, + { 1000000, 1, 5, 7, 0, 0}, { 0 /* Table terminator */ } }; #endif