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Date:      Fri, 15 Feb 2013 17:46:44 +0100
From:      Damjan Marion <dmarion@freebsd.org>
To:        Iain Young <iain@g7iii.net>
Cc:        freebsd-arm@FreeBSD.org
Subject:   Re: Beaglebone Serial Ports Progress
Message-ID:  <C54B5EBA-84A1-4BD9-AD7B-B61D7401E4F1@freebsd.org>
In-Reply-To: <511E1A08.4020105@g7iii.net>
References:  <511E1A08.4020105@g7iii.net>

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On Feb 15, 2013, at 12:20 PM, Iain Young <iain@g7iii.net> wrote:

> Hi Folks,
>=20
> After waiting for deliveries, and a few false starts, I have made
> -some- progress on adding support for the Beaglebone's serial ports
> (UARTS1-5) to FreeBSD
>=20
> First thing I did was add the pinmux stuff, having worked out exactly
> what I needed to add to the DTS, and recompile. This seems to have
> worked out well, and on a reboot I see:
>=20
> setting internal 28 for uart1_rxd
> setting internal 0 for uart1_txd
>=20
>=20
> This is good. kernel comes up,curiously though, I don't see lines
> output for the RTS and CTS lines (which I do set to the correct mode,
> yet I do for UART3 CTS and UART4 CTS, which I added as a test.
>=20
> I then proceeded to add  the uart1 device itself to the DTS, and
> added the following:
>=20
> 	uart1: serial@48022000 {
>                        compatible =3D "ns16550";
>                        reg =3D <0x48022000 0x1000>;
>                        reg-shift =3D <2>;
>                        interrupts =3D < 73 >;
>                        interrupt-parent =3D <&AINTC>;
>                        clock-frequency =3D < 48000000 >;
>                };
>=20
> This caused the kernel to dump me in db (debugger I guess). I figured
> out that 't' gave me a trace, and it looked like it was in the middle
> of probing for UARTS. (This is about as much knowledge I have about =
the
> kernel debugger)
>=20
> I tried changing 0x1000 for 0x2000, as it seems the next reg is also
> reserved for UART1. No more luck. So, thinking I needed to add it as =
an
> alias (as UART0 is), I added that, but it still dumped me at the
> debugger on boot.
>=20
> The only other thing is reg-shift. I must confess, I am a bit blind
> here. Not knowing what it actually did I left it as with UART0. I'm
> hoping it essentially includes the next register up for UART1, as
> while that's listed as "Reserved" in the memory map [Yes, I consulted
> SPRUH73G :)] , it seems to be reserved for UART1, but I am just
> guessing (Yes, I know, not good practice when kernel hacking...)
>=20
> I've attached the latest version of my patch, the output from the
> kernel until it blows up, as well as the trace. Patch is based on
> r246610
>=20
> Anyone able to point me in the right direction ? I can't be too far
> away, and I can then add UART2-5, and submit an actual working patch!
>=20

It is very likely that clock is disabled for USART1. Problem is that =
usart uses
standard serial driver which is not requesting clock to be enabled =
during the attach
by invoking ti_prcm_clk_enable().

Can you try to put following at the end of am335x_prcm_attach()?

	prcm_write_4(6c, 2);


This should be register CM_PER_UART1_CLKCTRL.

Damjan





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