Date: Sun, 08 Oct 2006 22:58:37 +0200 From: Ivan Voras <ivoras@fer.hr> To: Kip Macy <kmacy@fsmware.com> Cc: freebsd-current@freebsd.org Subject: Re: [PATCH] MAXCPU alterable in kernel config - needs testers Message-ID: <4529667D.8070108@fer.hr> In-Reply-To: <20061008135031.G83537@demos.bsdclusters.com> References: <2fd864e0610080423q7ba6bdeal656a223e662a5d@mail.gmail.com> <2006 10082011.53649.davidxu@freebsd.org> <egbnv6$crh$1@sea.gmane.org> <20061008135031.G83537@demos.bsdclusters.com>
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Kip Macy wrote: > It will only cover the single chip Niagara 2 boxes. Oh right, they'll doing multi chips in Niagara 2 :) Go Sun :) Still, single T2 chips should be more common, so I'd guess it will pay to optimize for that case. (For the rest of the audience: Niagara 1 has 32 logical CPUs and supports only one physical CPU/socket; Niagara 2 will have 64 logical CPUs and support > 1 CPUs/sockets; so a 2 socket Niagara 2 box will have 128 logical processors! Cue SciFi music...) Any word on how will they handle migration of threads across sockets (or will it be OS's job)? Judging from T1 architecture, I think such event would create a very large performance penalty, but I'm not an expert.
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