From owner-p4-projects@FreeBSD.ORG Wed Nov 12 06:10:03 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id B3D9D106568C; Wed, 12 Nov 2008 06:10:03 +0000 (UTC) Delivered-To: perforce@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5D7491065674 for ; Wed, 12 Nov 2008 06:10:03 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 519928FC14 for ; Wed, 12 Nov 2008 06:10:03 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id mAC6A2hH048230 for ; Wed, 12 Nov 2008 06:10:03 GMT (envelope-from gonzo@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id mAC6A2m0048228 for perforce@freebsd.org; Wed, 12 Nov 2008 06:10:02 GMT (envelope-from gonzo@FreeBSD.org) Date: Wed, 12 Nov 2008 06:10:02 GMT Message-Id: <200811120610.mAC6A2m0048228@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko To: Perforce Change Reviews Cc: Subject: PERFORCE change 152852 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 12 Nov 2008 06:10:03 -0000 http://perforce.freebsd.org/chv.cgi?CH=152852 Change 152852 by gonzo@gonzo_jeeves on 2008/11/12 06:09:04 - C99ify file - Add badaddr declaration to cpu.h for dev/siba Affected files ... .. //depot/projects/mips2/src/sys/mips/include/cpu.h#9 edit Differences ... ==== //depot/projects/mips2/src/sys/mips/include/cpu.h#9 (text+ko) ==== @@ -351,17 +351,17 @@ int cpuprid; struct { #if BYTE_ORDER == BIG_ENDIAN - u_int pad1:8; /* reserved */ - u_int cp_vendor:8; /* company identifier */ - u_int cp_imp:8; /* implementation identifier */ - u_int cp_majrev:4; /* major revision identifier */ - u_int cp_minrev:4; /* minor revision identifier */ + unsigned int pad1:8; i /* reserved */ + unsigned int cp_vendor:8; /* company identifier */ + unsigned int cp_imp:8; /* implementation identifier */ + unsigned int cp_majrev:4; /* major revision identifier */ + unsigned int cp_minrev:4; /* minor revision identifier */ #else - u_int cp_minrev:4; /* minor revision identifier */ - u_int cp_majrev:4; /* major revision identifier */ - u_int cp_imp:8; /* implementation identifier */ - u_int cp_vendor:8; /* company identifier */ - u_int pad1:8; /* reserved */ + unsigned int cp_minrev:4; /* minor revision identifier */ + unsigned int cp_majrev:4; /* major revision identifier */ + unsigned int cp_imp:8; /* implementation identifier */ + unsigned int cp_vendor:8; /* company identifier */ + unsigned int pad1:8; /* reserved */ #endif } cpu; }; @@ -448,13 +448,13 @@ struct tlb; struct user; -u_int32_t mips_cp0_config1_read(void); +uint32_t mips_cp0_config1_read(void); int Mips_ConfigCache(void); void Mips_SetWIRED(int); void Mips_SetPID(int); -u_int Mips_GetCOUNT(void); -void Mips_SetCOMPARE(u_int); -u_int Mips_GetCOMPARE(void); +unsigned int Mips_GetCOUNT(void); +void Mips_SetCOMPARE(unsigned int); +unsigned int Mips_GetCOMPARE(void); void Mips_SyncCache(void); void Mips_SyncDCache(vm_offset_t, int); @@ -473,8 +473,8 @@ void mips_TBIAP(int); void wbflush(void); -extern u_int32_t cpu_counter_interval; /* Number of counter ticks/tick */ -extern u_int32_t cpu_counter_last; /* Last compare value loaded */ +extern uint32_t cpu_counter_interval; /* Number of counter ticks/tick */ +extern uint32_t cpu_counter_last; /* Last compare value loaded */ extern int num_tlbentries; extern char btext[]; extern char etext[]; @@ -541,10 +541,9 @@ void setsoftintr1(void); void clearsoftintr1(void); +uint32_t mips_cp0_status_read(void); +void mips_cp0_status_write(uint32_t); -u_int32_t mips_cp0_status_read(void); -void mips_cp0_status_write(u_int32_t); - int disableintr(void); void restoreintr(int); int enableintr(void); @@ -554,9 +553,11 @@ void cpu_halt(void); void cpu_reset(void); -u_int32_t set_intr_mask(u_int32_t); -u_int32_t get_intr_mask(void); -u_int32_t get_cyclecount(void); +uint32_t set_intr_mask(u_int32_t); +uint32_t get_intr_mask(void); +uint32_t get_cyclecount(void); + +int badaddr(void *, size_t); #define cpu_spinwait() /* nothing */