From owner-svn-src-head@freebsd.org Wed Apr 26 16:13:24 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 92E52D51E9B; Wed, 26 Apr 2017 16:13:24 +0000 (UTC) (envelope-from cognet@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 497AA12CF; Wed, 26 Apr 2017 16:13:24 +0000 (UTC) (envelope-from cognet@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v3QGDNbX050303; Wed, 26 Apr 2017 16:13:23 GMT (envelope-from cognet@FreeBSD.org) Received: (from cognet@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v3QGDN37050300; Wed, 26 Apr 2017 16:13:23 GMT (envelope-from cognet@FreeBSD.org) Message-Id: <201704261613.v3QGDN37050300@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: cognet set sender to cognet@FreeBSD.org using -f From: Olivier Houchard Date: Wed, 26 Apr 2017 16:13:23 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r317441 - head/sys/dev/ahci X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 26 Apr 2017 16:13:24 -0000 Author: cognet Date: Wed Apr 26 16:13:22 2017 New Revision: 317441 URL: https://svnweb.freebsd.org/changeset/base/317441 Log: Check if the device is marked as dma-coherent in the FDT, and if so, let busdma know, so that on architectures where dma isn't always coherent, we know we don't have to write-back/invalidates cachelines on DMA operations. Reviewed by: andrew, mav Modified: head/sys/dev/ahci/ahci.c head/sys/dev/ahci/ahci.h head/sys/dev/ahci/ahci_generic.c Modified: head/sys/dev/ahci/ahci.c ============================================================================== --- head/sys/dev/ahci/ahci.c Wed Apr 26 14:50:06 2017 (r317440) +++ head/sys/dev/ahci/ahci.c Wed Apr 26 16:13:22 2017 (r317441) @@ -249,7 +249,8 @@ ahci_attach(device_t dev) (ctlr->caps & AHCI_CAP_64BIT) ? BUS_SPACE_MAXADDR : BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED, BUS_SPACE_MAXSIZE, - 0, NULL, NULL, &ctlr->dma_tag)) { + ctlr->dma_coherent ? BUS_DMA_COHERENT : 0, NULL, NULL, + &ctlr->dma_tag)) { ahci_free_mem(dev); rman_fini(&ctlr->sc_iomem); return (ENXIO); Modified: head/sys/dev/ahci/ahci.h ============================================================================== --- head/sys/dev/ahci/ahci.h Wed Apr 26 14:50:06 2017 (r317440) +++ head/sys/dev/ahci/ahci.h Wed Apr 26 16:13:22 2017 (r317441) @@ -519,6 +519,7 @@ struct ahci_controller { void *argument; } interrupt[AHCI_MAX_PORTS]; void (*ch_start)(struct ahci_channel *); + int dma_coherent; /* DMA is cache-coherent */ }; enum ahci_err_type { Modified: head/sys/dev/ahci/ahci_generic.c ============================================================================== --- head/sys/dev/ahci/ahci_generic.c Wed Apr 26 14:50:06 2017 (r317440) +++ head/sys/dev/ahci/ahci_generic.c Wed Apr 26 16:13:22 2017 (r317441) @@ -68,6 +68,8 @@ static struct ofw_compat_data compat_dat static int ahci_fdt_probe(device_t dev) { + struct ahci_controller *ctlr = device_get_softc(dev); + phandle_t node; if (!ofw_bus_status_okay(dev)) return (ENXIO); @@ -76,6 +78,8 @@ ahci_fdt_probe(device_t dev) return (ENXIO); device_set_desc_copy(dev, "AHCI SATA controller"); + node = ofw_bus_get_node(dev); + ctlr->dma_coherent = OF_hasprop(node, "dma-coherent"); return (BUS_PROBE_DEFAULT); } #endif