Date: Wed, 11 Feb 1998 19:52:01 -0500 From: Brian McGovern <bmcgover@cisco.com> To: Mike Smith <mike@smith.net.au> Cc: dg@root.com, hackers@FreeBSD.ORG Subject: Re: Mapping phyical memory in to the PCI address range... Message-ID: <199802120052.TAA06972@bmcgover-pc.cisco.com> In-Reply-To: Your message of "Wed, 11 Feb 1998 15:20:05 PST." <199802112320.PAA01611@dingo.cdrom.com>
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The UARTs they use on the board have a 64 byte buffer. By Cyclades estimates, about 32 bytes would be available about the time the firmware would be ready to move the data into whatever buffers it uses. And no, Mike, I don't mind you butting in. Thats why I threw this in the air, to try to get several opinions from several people, and try to hash out who was right, and why... I figured that after some debate, a clearer cut answer would come out. Again, I ask from the perspective that I'm trying to minimize HOST CPU usage for moving the data, and figured a RAM (buffer) to RAM (clist) copy on the motherboard would be cheaper/faster for the host than a RAM (buffer) to RAM (clist) copy over the PCI bus. I'd therefore also expect that the inverse would be true. But, from most of what I've heard, there should be little difference at a cost of extra PLX9060 programming (which looks easy on paper). -Brian To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe hackers" in the body of the message
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