Date: Thu, 16 Aug 2018 08:05:04 +0000 (UTC) From: Hans Petter Selasky <hselasky@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r337893 - stable/11/sys/i386/include Message-ID: <201808160805.w7G854Pi015699@repo.freebsd.org>
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Author: hselasky Date: Thu Aug 16 08:05:04 2018 New Revision: 337893 URL: https://svnweb.freebsd.org/changeset/base/337893 Log: MFC r337529: Implement missing atomic_fcmpset_XXX() support for i386. Sponsored by: Mellanox Technologies Modified: stable/11/sys/i386/include/atomic.h Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/i386/include/atomic.h ============================================================================== --- stable/11/sys/i386/include/atomic.h Thu Aug 16 07:34:10 2018 (r337892) +++ stable/11/sys/i386/include/atomic.h Thu Aug 16 08:05:04 2018 (r337893) @@ -128,6 +128,7 @@ u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p) void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) int atomic_cmpset_64(volatile uint64_t *, uint64_t, uint64_t); +int atomic_fcmpset_64(volatile uint64_t *, uint64_t *, uint64_t); uint64_t atomic_load_acq_64(volatile uint64_t *); void atomic_store_rel_64(volatile uint64_t *, uint64_t); uint64_t atomic_swap_64(volatile uint64_t *, uint64_t); @@ -402,6 +403,18 @@ atomic_cmpset_64_i386(volatile uint64_t *dst, uint64_t return (res); } +static __inline int +atomic_fcmpset_64_i386(volatile uint64_t *dst, uint64_t *expect, uint64_t src) +{ + + if (atomic_cmpset_64_i386(dst, *expect, src)) { + return (1); + } else { + *expect = *dst; + return (0); + } +} + static __inline uint64_t atomic_load_acq_64_i386(volatile uint64_t *p) { @@ -481,6 +494,24 @@ atomic_cmpset_64_i586(volatile uint64_t *dst, uint64_t return (res); } +static __inline int +atomic_fcmpset_64_i586(volatile uint64_t *dst, uint64_t *expect, uint64_t src) +{ + u_char res; + + __asm __volatile( + " " MPLOCKED " " + " cmpxchg8b %1 ; " + " sete %0" + : "=q" (res), /* 0 */ + "+m" (*dst), /* 1 */ + "+A" (*expect) /* 2 */ + : "b" ((uint32_t)src), /* 3 */ + "c" ((uint32_t)(src >> 32)) /* 4 */ + : "memory", "cc"); + return (res); +} + static __inline uint64_t atomic_load_acq_64_i586(volatile uint64_t *p) { @@ -540,6 +571,16 @@ atomic_cmpset_64(volatile uint64_t *dst, uint64_t expe return (atomic_cmpset_64_i586(dst, expect, src)); } +static __inline int +atomic_fcmpset_64(volatile uint64_t *dst, uint64_t *expect, uint64_t src) +{ + + if ((cpu_feature & CPUID_CX8) == 0) + return (atomic_fcmpset_64_i386(dst, expect, src)); + else + return (atomic_fcmpset_64_i586(dst, expect, src)); +} + static __inline uint64_t atomic_load_acq_64(volatile uint64_t *p) { @@ -653,6 +694,14 @@ atomic_cmpset_long(volatile u_long *dst, u_long expect (u_int)src)); } +static __inline int +atomic_fcmpset_long(volatile u_long *dst, u_long *expect, u_long src) +{ + + return (atomic_fcmpset_int((volatile u_int *)dst, (u_int *)expect, + (u_int)src)); +} + static __inline u_long atomic_fetchadd_long(volatile u_long *p, u_long v) { @@ -832,6 +881,8 @@ u_long atomic_swap_long(volatile u_long *p, u_long v); /* Operations on 64-bit quad words. */ #define atomic_cmpset_acq_64 atomic_cmpset_64 #define atomic_cmpset_rel_64 atomic_cmpset_64 +#define atomic_fcmpset_acq_64 atomic_fcmpset_64 +#define atomic_fcmpset_rel_64 atomic_fcmpset_64 #define atomic_fetchadd_acq_64 atomic_fetchadd_64 #define atomic_fetchadd_rel_64 atomic_fetchadd_64 #define atomic_add_acq_64 atomic_add_64
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