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Date:      Mon, 28 Dec 2009 11:22:18 -0800
From:      Pyun YongHyeon <pyunyh@gmail.com>
To:        John Baldwin <jhb@freebsd.org>
Cc:        Jack F Vogel <jfv@freebsd.org>, svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org
Subject:   Re: svn commit: r199192 - head/sys/dev/e1000
Message-ID:  <20091228192218.GB1166@michelle.cdnetworks.com>
In-Reply-To: <200912281357.04461.jhb@freebsd.org>
References:  <200911111913.nABJDewR004319@svn.freebsd.org> <200912281357.04461.jhb@freebsd.org>

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On Mon, Dec 28, 2009 at 01:57:04PM -0500, John Baldwin wrote:
> On Wednesday 11 November 2009 2:13:40 pm Jack F Vogel wrote:
> > Author: jfv
> > Date: Wed Nov 11 19:13:40 2009
> > New Revision: 199192
> > URL: http://svn.freebsd.org/changeset/base/199192
> > 
> > Log:
> >   With an i386 kernel the igb driver can cause a
> >   page fault panic on initialization due to a large
> >   number of bounce pages being allocated. This is due
> >   to the dma tag requiring page alignment on mbuf mapping.
> >   This was removed some time back from the ixgbe driver
> >   and is not needed here either.
> > 
> > Modified:
> >   head/sys/dev/e1000/if_igb.c
> > 
> > Modified: head/sys/dev/e1000/if_igb.c
> > 
> ==============================================================================
> > --- head/sys/dev/e1000/if_igb.c	Wed Nov 11 19:00:12 2009	(r199191)
> > +++ head/sys/dev/e1000/if_igb.c	Wed Nov 11 19:13:40 2009	(r199192)
> > @@ -2654,7 +2654,7 @@ igb_dma_malloc(struct adapter *adapter, 
> >  	int error;
> >  
> >  	error = bus_dma_tag_create(bus_get_dma_tag(adapter->dev), /* parent */
> > -				IGB_DBA_ALIGN, 0,	/* alignment, bounds */
> > +				1, 0,			/* alignment, bounds */
> >  				BUS_SPACE_MAXADDR,	/* lowaddr */
> >  				BUS_SPACE_MAXADDR,	/* highaddr */
> >  				NULL, NULL,		/* filter, filterarg */
> 
> em(4) still has EM_DBA_ALIGN for em_dma_alloc(), but it uses '1' for the align 
> for RX and TX buffers.  Should this specific tag be changed back to using 
> IGB_DBA_ALIGN or should em(4) be changed to use '1' for em_dma_alloc()?
> 

I think em(4) is right. 82576 GbE datasheet says 16 bytes alignment
restrictions for TX/RX descriptors(page 265 and page 284). I
remember IGB_DBA_ALIGN was chosen to align on 128 byte boundary to
optimize cache line effect because descriptor length should be
multiple of 128 bytes.

> -- 
> John Baldwin



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