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Date:      Fri, 13 Mar 2015 09:52:12 +0200
From:      Konstantin Belousov <kostikbel@gmail.com>
To:        Peter Jeremy <peter@rulingia.com>
Cc:        "freebsd-hackers@freebsd.org" <freebsd-hackers@freebsd.org>, Adrian Chadd <adrian@freebsd.org>, freebsd-hardware@freebsd.org
Subject:   Re: Server with 3TB Crashing at boot
Message-ID:  <20150313075212.GU2379@kib.kiev.ua>
In-Reply-To: <20150313054116.GB92183@server.rulingia.com>
References:  <550046F7.1050205@fuckner.net> <CAJ-VmokruCyo3M5up9n%2BAfvkr7VFBtUftpdgc=52ES%2BNt6=JZA@mail.gmail.com> <CAPQ4ffsd-SpsLTbGL8BdBsNHLx9HhVQ4Wh%2B95M98fCmT5idPAg@mail.gmail.com> <550093DD.5040603@freebsd.org> <55015D3B.6030605@fuckner.net> <5501DD57.7030305@freebsd.org> <CAJ-Vmom%2BZy_6ZCcTA_h4LFL-wDdaCmbqAgN5shpOsBBgWJw1mg@mail.gmail.com> <20150313054116.GB92183@server.rulingia.com>

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On Fri, Mar 13, 2015 at 04:41:16PM +1100, Peter Jeremy wrote:
> On 2015-Mar-12 12:30:39 -0700, Adrian Chadd <adrian@freebsd.org> wrote:
> >Right. Try booting it with SMP disabled but with all the RAM.
> 
> Is this possible?  Can one CPU see the RAM on another CPU if that CPU
> isn't enabled in the kernel?

Yes, of course. The disabled state means that the core is not started to
execute the stream of the architectural instructions opcodes. The memory
controller, address decoder and inter-socket links, and pcie links are
configured by the motherboard firmware during the POST. They are left
alone by our kernel.



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