From owner-freebsd-current Sun Mar 10 06:26:39 1996 Return-Path: owner-current Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id GAA29949 for current-outgoing; Sun, 10 Mar 1996 06:26:39 -0800 (PST) Received: from asstdc.scgt.oz.au (root@asstdc.scgt.oz.au [202.14.234.65]) by freefall.freebsd.org (8.7.3/8.7.3) with SMTP id GAA29944 for ; Sun, 10 Mar 1996 06:26:35 -0800 (PST) Received: (from imb@localhost) by asstdc.scgt.oz.au (8.6.12/BSD4.4) id BAA02483; Mon, 11 Mar 1996 01:25:34 +1100 From: michael butler Message-Id: <199603101425.BAA02483@asstdc.scgt.oz.au> Subject: Re: AMD doesn't like SNAP! (panic: unwire: page not in pmap) To: rgrimes@GndRsh.aac.dev.com (Rodney W. Grimes) Date: Mon, 11 Mar 1996 01:25:33 +1100 (EST) Cc: current@freebsd.org In-Reply-To: <199603100445.UAA10659@GndRsh.aac.dev.com> from "Rodney W. Grimes" at Mar 9, 96 08:45:51 pm X-Mailer: ELM [version 2.4 PL24beta] Content-Type: text Sender: owner-current@freebsd.org X-Loop: FreeBSD.org Precedence: bulk Rodney W. Grimes writes: > > So far three people, including myself, have reported the above panic > > message when booting the 3/3 SNAP kernel. All three of us have AMD DX4 > > processors (100 and 120MHz). > Can all three of you tell me if you have A80486DX4-100NV8T's or > A80486DX4-100SV8B's? The difference is the SV8B is the write back > enhanced DX4 and unless you have a motherboard that understands > how to deal with this you are going to have a cache coherency problem > between the internal and external cache. I note that through a number of drivers there is mention of cache-invalidation instructions (software-style) but none of them seem to implement anything of this nature. Is there a problem with doing this .. that is .. to invalidate the page(s) into which data has just been transferred prior to the application being told that the transfer completed? No other cases need to be considered do they ? michael