Date: Thu, 6 Sep 2007 22:48:35 GMT From: Marius Strobl <marius@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 126140 for review Message-ID: <200709062248.l86MmZuo006711@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=126140 Change 126140 by marius@flak on 2007/09/06 22:47:36 - Adapt to the sparc64 INTR_FILTER code that hit CVS. - Correct some comments. - Use more appropriate types for some softc members. Affected files ... .. //depot/projects/usiii/sparc64/pci/schizo.c#2 edit .. //depot/projects/usiii/sparc64/pci/schizovar.h#2 edit Differences ... ==== //depot/projects/usiii/sparc64/pci/schizo.c#2 (text+ko) ==== @@ -177,16 +177,16 @@ struct schizo_icarg { struct schizo_softc *sica_sc; - bus_addr_t sica_map; /* map register */ - bus_addr_t sica_clr; /* clear register */ + bus_addr_t sica_map; + bus_addr_t sica_clr; }; struct schizo_dmasync { struct schizo_softc *sds_sc; - driver_filter_t *sds_handler; /* handler to call */ - void *sds_arg; /* argument for the handler */ - void *sds_cookie; /* parent bus int. cookie */ - u_int sds_ino; /* INO */ + driver_filter_t *sds_handler; + void *sds_arg; + void *sds_cookie; + u_int sds_ino; }; #define SCZTOM_SPC_READ_8(spc, sc, offs) \ @@ -265,7 +265,6 @@ bus_addr_t intrclr, intrmap; uint64_t reg; phandle_t node; - uint32_t portid; uint32_t prop_array[2]; int i, mode, n, nrange, rid, tsbsize; @@ -330,9 +329,8 @@ sc->sc_mtx = osc->sc_mtx; } - if (OF_getprop(node, "portid", &portid, sizeof(portid)) == -1) - panic("%s: could not determine portid", __func__); - sc->sc_ign = (portid << INTMAP_IGN_SHIFT) & INTMAP_IGN_MASK; + if (OF_getprop(node, "portid", &sc->sc_ign, sizeof(sc->sc_ign)) == -1) + panic("%s: could not determine IGN", __func__); if (OF_getprop(node, "version#", &sc->sc_ver, sizeof(sc->sc_ver)) == -1) panic("%s: could not determine version", __func__); @@ -394,8 +392,8 @@ /* * Hunt through all the interrupt mapping regs and register * the interrupt controller for our interrupt vectors. This - * is compilcated by the fact that a pair of Schizo PBMs - * share one interrupt controller. + * is complicated by the fact that a pair of Schizo PBMs + * share one IGN. */ n = OF_getprop(node, "ino-bitmap", (void *)prop_array, sizeof(prop_array)); @@ -422,8 +420,8 @@ n, (u_long)intrmap, (u_long)SCZTOM_PCI_READ_8(sc, intrmap), (u_long)intrclr); #endif - if (intr_controller_register(n | sc->sc_ign, &schizo_ic, - sica) != 0) + if (intr_controller_register(INTMAP_VEC(sc->sc_ign, n), + &schizo_ic, sica) != 0) panic("%s: could not register interrupt controller " "for INO %d", __func__, n); } @@ -438,8 +436,8 @@ if (sc->sc_half == 0) { if ((reg & (1ULL << SCZTOM_PCIERR_A_INO)) != 0 || (osc != NULL && ((struct schizo_icarg *)intr_vectors[ - sc->sc_ign | SCZTOM_PCIERR_A_INO].iv_icarg)->sica_sc == - osc)) + INTMAP_VEC(sc->sc_ign, SCZTOM_PCIERR_A_INO)].iv_icarg)-> + sica_sc == osc)) /* * We are the driver for PBM A and either also * registered the interrupt controller for us or @@ -460,8 +458,8 @@ } else { if ((reg & (1ULL << SCZTOM_PCIERR_B_INO)) != 0 || (osc != NULL && ((struct schizo_icarg *)intr_vectors[ - sc->sc_ign | SCZTOM_PCIERR_B_INO].iv_icarg)->sica_sc == - osc)) + INTMAP_VEC(sc->sc_ign, SCZTOM_PCIERR_B_INO)].iv_icarg)-> + sica_sc == osc)) /* * We are the driver for PBM B and either also * registered the interrupt controller for us or @@ -612,7 +610,7 @@ sc->sc_irq_res[index] = bus_alloc_resource_any(sc->sc_dev, SYS_RES_IRQ, &rid, RF_ACTIVE); if (sc->sc_irq_res[index] == NULL || - INTVEC(vec = rman_get_start(sc->sc_irq_res[index])) == 0 || + INTIGN(vec = rman_get_start(sc->sc_irq_res[index])) != sc->sc_ign || INTINO(vec) != ino || intr_vectors[vec].iv_ic != &schizo_ic || bus_setup_intr(sc->sc_dev, sc->sc_irq_res[index], INTR_TYPE_MISC, @@ -628,7 +626,7 @@ uint64_t mr; /* - * XXX we only look for INOs rather than IGNs since the firmware + * XXX we only look for INOs rather than INRs since the firmware * may not provide the IGN and the IGN is constant for all devices * on that PCI controller. */ @@ -940,10 +938,8 @@ struct intr_vector *iv = arg; struct schizo_icarg *sica = iv->iv_icarg; - SCZTOM_PCI_WRITE_8(sica->sica_sc, sica->sica_clr, 0); SCZTOM_PCI_WRITE_8(sica->sica_sc, sica->sica_map, - INTMAP_ENABLE(SCZTOM_PCI_READ_8(sica->sica_sc, sica->sica_map), - iv->iv_mid)); + INTMAP_ENABLE(iv->iv_vec, iv->iv_mid)); } static void @@ -952,8 +948,7 @@ struct intr_vector *iv = arg; struct schizo_icarg *sica = iv->iv_icarg; - SCZTOM_PCI_WRITE_8(sica->sica_sc, sica->sica_map, - SCZTOM_PCI_READ_8(sica->sica_sc, sica->sica_map) & ~INTMAP_V); + SCZTOM_PCI_WRITE_8(sica->sica_sc, sica->sica_map, iv->iv_vec); } static void @@ -981,7 +976,8 @@ * our interrupt controller for it. */ vec = rman_get_start(ires); - if (INTVEC(vec) == 0 || intr_vectors[vec].iv_ic != &schizo_ic) { + if (INTIGN(vec) != sc->sc_ign || + intr_vectors[vec].iv_ic != &schizo_ic) { device_printf(dev, "invalid interrupt vector 0x%lx\n", vec); return (EINVAL); } @@ -1067,7 +1063,7 @@ */ if (start != end) panic("%s: XXX: interrupt range", __func__); - start = end |= sc->sc_ign; + start = end = INTMAP_VEC(sc->sc_ign, end); return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type, rid, start, end, count, flags)); } ==== //depot/projects/usiii/sparc64/pci/schizovar.h#2 (text+ko) ==== @@ -38,13 +38,13 @@ phandle_t sc_node; - int sc_mode; + u_int sc_mode; #define SCHIZO_MODE_SCZ 1 #define SCHIZO_MODE_TOM 2 - int sc_half; - int sc_ign; - int sc_ver; + u_int sc_half; + uint32_t sc_ign; + u_int sc_ver; struct resource *sc_mem_res[TOM_NREG]; struct resource *sc_irq_res[SCZTOM_NINTR];
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