From owner-freebsd-bugs Sun Mar 19 20:55:04 1995 Return-Path: bugs-owner Received: (from majordom@localhost) by freefall.cdrom.com (8.6.10/8.6.6) id UAA01398 for bugs-outgoing; Sun, 19 Mar 1995 20:55:04 -0800 Received: from hutcs.cs.hut.fi (root@hutcs.cs.hut.fi [130.233.192.2]) by freefall.cdrom.com (8.6.10/8.6.6) with SMTP id UAA01392 for ; Sun, 19 Mar 1995 20:55:02 -0800 Received: from shadows.cs.hut.fi by hutcs.cs.hut.fi with SMTP id AA22685 (5.65c8/HUTCS-S 1.4 for ); Mon, 20 Mar 1995 06:54:48 +0200 From: Heikki Suonsivu Received: (hsu@localhost) by shadows.cs.hut.fi (8.6.10/8.6.10) id GAA03389; Mon, 20 Mar 1995 06:54:53 +0200 Date: Mon, 20 Mar 1995 06:54:53 +0200 Message-Id: <199503200454.GAA03389@shadows.cs.hut.fi> To: freebsd-bugs@FreeBSD.org In-Reply-To: Heikki Suonsivu's message of 13 Mar 1995 15:49:51 +0200 Subject: NCR SCSI fails Organization: Helsinki University of Technology, Otaniemi, Finland Sender: bugs-owner@FreeBSD.org Precedence: bulk Is there any hope a solution would appear for this soon? Or should I forget the NCR controller and shell out the $400 for a Buslogic? Anyone working on this? The exact error generated was ncr0 int a irq 11 on pci0:3 reg20 : virtual = 0xf665d000 physical = 0xffbeff00 CACHE TEST FAILED: reg dstat - sstat2 readback ffffffff CACHE INCORRECTLY CONFIGURED This failed on our P60 motherboard with NCR SCSI, is this a broken motherboard, configuration problem or something else? More workout; This "cache test" fails even if both internal and external caches are disabled. I also went through all BIOS settings and disabled everything which even distantly hinted into any caching or buffering, to no avail. So, it seems that this cache test can't be quite correct? The only oddity I can see is that the code doesn't first check what is sees in the "read-only" address before it tries to write 0xffffffff into it? /*========================================================== ** ** ** Test the pci bus snoop logic :-( ** ** Has to be called with interrupts disabled. ** ** **========================================================== */ #ifndef NCR_IOMAPPED static int ncr_regtest (struct ncb* np) { register volatile u_long data, *addr; /* ** ncr registers may NOT be cached. ** write 0xffffffff to a read only register area, ** and try to read it back. */ addr = (u_long*) &np->reg->nc_dstat; data = 0xffffffff; *addr= data; data = *addr; #if 1 if (data == 0xffffffff) { #else if ((data & 0xe2f0fffd) != 0x02000080) { #endif printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", (unsigned) data); return (0x10); }; return (0); } #endif -- Heikki Suonsivu, T{ysikuu 10 C 83/02210 Espoo/FINLAND, hsu@cs.hut.fi home +358-0-8031121 work -4513377 fax -4555276 riippu SN