Date: Thu, 12 Feb 2015 17:01:55 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r278626 - stable/10/sys/arm/arm Message-ID: <201502121701.t1CH1tvW087154@svn.freebsd.org>
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Author: ian Date: Thu Feb 12 17:01:54 2015 New Revision: 278626 URL: https://svnweb.freebsd.org/changeset/base/278626 Log: MFC r276191: Display correct value for cache level-of-coherency (needs +1). Modified: stable/10/sys/arm/arm/identcpu.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/arm/arm/identcpu.c ============================================================================== --- stable/10/sys/arm/arm/identcpu.c Thu Feb 12 15:46:44 2015 (r278625) +++ stable/10/sys/arm/arm/identcpu.c Thu Feb 12 17:01:54 2015 (r278626) @@ -455,7 +455,7 @@ identify_arm_cpu(void) if (arm_cache_level) { printf("LoUU:%d LoC:%d LoUIS:%d \n", CPU_CLIDR_LOUU(arm_cache_level) + 1, - arm_cache_loc, CPU_CLIDR_LOUIS(arm_cache_level) + 1); + arm_cache_loc + 1, CPU_CLIDR_LOUIS(arm_cache_level) + 1); i = 0; while (((type = CPU_CLIDR_CTYPE(arm_cache_level, i)) != 0) && i < 7) { printf("Cache level %d: \n", i + 1);
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