Date: Sun, 28 Apr 2019 19:52:49 +0000 (UTC) From: Navdeep Parhar <np@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r346855 - in stable/11/sys: conf dev/cxgbe dev/cxgbe/common dev/cxgbe/firmware dev/cxgbe/tom modules/cxgbe/if_cxgbe Message-ID: <201904281952.x3SJqnxt029847@repo.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: np Date: Sun Apr 28 19:52:48 2019 New Revision: 346855 URL: https://svnweb.freebsd.org/changeset/base/346855 Log: MFC r333153, r333394, r333442, r333472, r333620, r334058, r334447, r334452, and r335684. These revisions added hashfilters, NAT offload, and SMAC/DMAC swapping filters to cxgbe. r333153: cxgbe(4): Move all TCAM filter code into a separate file. Sponsored by: Chelsio Communications r333394: cxgbe(4): Add support for hash filters. These filters reside in the card's memory instead of its TCAM and can be configured via a new "hashfilter" subcommand in cxgbetool. Hash and normal TCAM filters can be used together. The hardware does an exact-match of packet fields for hash filters, unlike the masked match performed for TCAM filters. Any T5/T6 card with memory can support at least half a million hash filters. The sample config file with the driver configures 512K of these, it is possible to double this to 1 million+ in some cases. The chip does an exact-match of fields of incoming datagrams with hash filters and performs the action configured for the filter if it matches. The fields to match are specified in a "filter mask" in the firmware config file. The filter mask always includes the 5-tuple (sip, dip, sport, dport, ipproto). It can, optionally, also include any subset of the filter mode (see filterMode and filterMask in the firmware config file). For example: filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe filterMask = protocol, port, vlan Exact values of the 5-tuple, the physical port, and VLAN tag would have to be provided while setting up a hash filter with the chip configuration above. Hash filters support all actions supported by TCAM filters. A packet that hits a hash filter can be dropped, let through (with optional steering to a specific queue or RSS region), switched out of another port (with optional L2 rewrite of DMAC, SMAC, VLAN tag), or get NAT'ed. (Support for some of these will show up in the driver in a follow-up commit very shortly). Sponsored by: Chelsio Communications r333442: cxgbe(4): Determine whether the firmware supports the FILTER2 work request, which can be used to configure hardware NAT and swapmac. All firmwares released after Jan 2017 support this work request. Sponsored by: Chelsio Communications r333472: cxgbe(4): Add fields to support configuration of hardware NAT and swapmac (SMAC/DMAC switcheroo) from userspace. Sponsored by: Chelsio Communications r333620: cxgbe(4): Filtering related features and fixes. - Driver support for hardware NAT. - Driver support for swapmac action. - Validate a request to create a hashfilter against the filter mask. - Add a hashfilter config file for T5. Sponsored by: Chelsio Communications r334058: cxgbe(4): Only valid filters are expected to have a valid tid. r334447: cxgbe(4): Add code to deal with the chip's source MAC table (aka SMT). Submitted by: Krishnamraju Eraparaju @ Chelsio Sponsored by: Chelsio Communications r334452: cxgbe(4): Add support for SMAC-rewriting filters. Submitted by: Krishnamraju Eraparaju @ Chelsio Sponsored by: Chelsio Communications r335684: cxgbe(4): Do not leak the filters in the hashfilter table on module unload. Sponsored by: Chelsio Communications Relnotes: Yes Added: stable/11/sys/dev/cxgbe/firmware/t5fw_cfg_hashfilter.txt - copied unchanged from r333620, head/sys/dev/cxgbe/firmware/t5fw_cfg_hashfilter.txt stable/11/sys/dev/cxgbe/firmware/t6fw_cfg_hashfilter.txt - copied unchanged from r333394, head/sys/dev/cxgbe/firmware/t6fw_cfg_hashfilter.txt stable/11/sys/dev/cxgbe/t4_filter.c - copied, changed from r333153, head/sys/dev/cxgbe/t4_filter.c stable/11/sys/dev/cxgbe/t4_smt.c - copied unchanged from r334447, head/sys/dev/cxgbe/t4_smt.c stable/11/sys/dev/cxgbe/t4_smt.h - copied unchanged from r334447, head/sys/dev/cxgbe/t4_smt.h Modified: stable/11/sys/conf/files stable/11/sys/dev/cxgbe/adapter.h stable/11/sys/dev/cxgbe/common/common.h stable/11/sys/dev/cxgbe/common/t4_hw.c stable/11/sys/dev/cxgbe/common/t4_msg.h stable/11/sys/dev/cxgbe/common/t4_regs_values.h stable/11/sys/dev/cxgbe/offload.h stable/11/sys/dev/cxgbe/t4_ioctl.h stable/11/sys/dev/cxgbe/t4_main.c stable/11/sys/dev/cxgbe/t4_sge.c stable/11/sys/dev/cxgbe/tom/t4_connect.c stable/11/sys/dev/cxgbe/tom/t4_cpl_io.c stable/11/sys/dev/cxgbe/tom/t4_tom.c stable/11/sys/modules/cxgbe/if_cxgbe/Makefile Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/conf/files ============================================================================== --- stable/11/sys/conf/files Sun Apr 28 19:07:31 2019 (r346854) +++ stable/11/sys/conf/files Sun Apr 28 19:52:48 2019 (r346855) @@ -1330,6 +1330,8 @@ dev/cxgb/sys/uipc_mvec.c optional cxgb pci \ compile-with "${NORMAL_C} -I$S/dev/cxgb" dev/cxgb/cxgb_t3fw.c optional cxgb cxgb_t3fw \ compile-with "${NORMAL_C} -I$S/dev/cxgb" +dev/cxgbe/t4_filter.c optional cxgbe pci \ + compile-with "${NORMAL_C} -I$S/dev/cxgbe" dev/cxgbe/t4_if.m optional cxgbe pci dev/cxgbe/t4_iov.c optional cxgbe pci \ compile-with "${NORMAL_C} -I$S/dev/cxgbe" @@ -1342,6 +1344,8 @@ dev/cxgbe/t4_netmap.c optional cxgbe pci \ dev/cxgbe/t4_sched.c optional cxgbe pci \ compile-with "${NORMAL_C} -I$S/dev/cxgbe" dev/cxgbe/t4_sge.c optional cxgbe pci \ + compile-with "${NORMAL_C} -I$S/dev/cxgbe" +dev/cxgbe/t4_smt.c optional cxgbe pci \ compile-with "${NORMAL_C} -I$S/dev/cxgbe" dev/cxgbe/t4_l2t.c optional cxgbe pci \ compile-with "${NORMAL_C} -I$S/dev/cxgbe" Modified: stable/11/sys/dev/cxgbe/adapter.h ============================================================================== --- stable/11/sys/dev/cxgbe/adapter.h Sun Apr 28 19:07:31 2019 (r346854) +++ stable/11/sys/dev/cxgbe/adapter.h Sun Apr 28 19:52:48 2019 (r346855) @@ -372,7 +372,7 @@ enum { CPL_COOKIE_DDP0, CPL_COOKIE_DDP1, CPL_COOKIE_TOM, - CPL_COOKIE_AVAILABLE1, + CPL_COOKIE_HASHFILTER, CPL_COOKIE_AVAILABLE2, CPL_COOKIE_AVAILABLE3, @@ -823,6 +823,7 @@ struct adapter { void *iscsi_ulp_softc; /* (struct cxgbei_data *) */ void *ccr_softc; /* (struct ccr_softc *) */ struct l2t_data *l2t; /* L2 table */ + struct smt_data *smt; /* Source MAC Table */ struct tid_info tids; vmem_t *key_map; @@ -1113,7 +1114,6 @@ void t4_init_devnames(struct adapter *); void t4_add_adapter(struct adapter *); void t4_aes_getdeckey(void *, const void *, unsigned int); int t4_detach_common(device_t); -int t4_filter_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *); int t4_map_bars_0_and_4(struct adapter *); int t4_map_bar_2(struct adapter *); int t4_setup_intr_handlers(struct adapter *); @@ -1192,6 +1192,18 @@ int t4_free_tx_sched(struct adapter *); void t4_update_tx_sched(struct adapter *); int t4_reserve_cl_rl_kbps(struct adapter *, int, u_int, int *); void t4_release_cl_rl_kbps(struct adapter *, int, int); + +/* t4_filter.c */ +int get_filter_mode(struct adapter *, uint32_t *); +int set_filter_mode(struct adapter *, uint32_t); +int get_filter(struct adapter *, struct t4_filter *); +int set_filter(struct adapter *, struct t4_filter *); +int del_filter(struct adapter *, struct t4_filter *); +int t4_filter_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *); +int t4_hashfilter_ao_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *); +int t4_hashfilter_tcb_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *); +int t4_del_hashfilter_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *); +void free_hftid_tab(struct tid_info *); static inline struct wrqe * alloc_wrqe(int wr_len, struct sge_wrq *wrq) Modified: stable/11/sys/dev/cxgbe/common/common.h ============================================================================== --- stable/11/sys/dev/cxgbe/common/common.h Sun Apr 28 19:07:31 2019 (r346854) +++ stable/11/sys/dev/cxgbe/common/common.h Sun Apr 28 19:52:48 2019 (r346855) @@ -237,6 +237,7 @@ struct tp_params { uint32_t vlan_pri_map; uint32_t ingress_config; + uint64_t hash_filter_mask; __be16 err_vec_mask; int8_t fcoe_shift; @@ -370,6 +371,8 @@ struct adapter_params { unsigned int bypass:1; /* this is a bypass card */ unsigned int ethoffload:1; unsigned int port_caps32:1; + unsigned int hash_filter:1; + unsigned int filter2_wr_support:1; unsigned int ofldq_wr_cred; unsigned int eo_wr_cred; @@ -457,6 +460,11 @@ static inline int is_offload(const struct adapter *ada static inline int is_ethoffload(const struct adapter *adap) { return adap->params.ethoffload; +} + +static inline int is_hashfilter(const struct adapter *adap) +{ + return adap->params.hash_filter; } static inline int chip_id(struct adapter *adap) Modified: stable/11/sys/dev/cxgbe/common/t4_hw.c ============================================================================== --- stable/11/sys/dev/cxgbe/common/t4_hw.c Sun Apr 28 19:07:31 2019 (r346854) +++ stable/11/sys/dev/cxgbe/common/t4_hw.c Sun Apr 28 19:52:48 2019 (r346855) @@ -8685,6 +8685,7 @@ int t4_init_sge_params(struct adapter *adapter) static void read_filter_mode_and_ingress_config(struct adapter *adap, bool sleep_ok) { + uint32_t v; struct tp_params *tpp = &adap->params.tp; t4_tp_pio_read(adap, &tpp->vlan_pri_map, 1, A_TP_VLAN_PRI_MAP, @@ -8708,12 +8709,12 @@ static void read_filter_mode_and_ingress_config(struct tpp->matchtype_shift = t4_filter_field_shift(adap, F_MPSHITTYPE); tpp->frag_shift = t4_filter_field_shift(adap, F_FRAGMENTATION); - /* - * If TP_INGRESS_CONFIG.VNID == 0, then TP_VLAN_PRI_MAP.VNIC_ID - * represents the presence of an Outer VLAN instead of a VNIC ID. - */ - if ((tpp->ingress_config & F_VNIC) == 0) - tpp->vnic_shift = -1; + if (chip_id(adap) > CHELSIO_T4) { + v = t4_read_reg(adap, LE_HASH_MASK_GEN_IPV4T5(3)); + adap->params.tp.hash_filter_mask = v; + v = t4_read_reg(adap, LE_HASH_MASK_GEN_IPV4T5(4)); + adap->params.tp.hash_filter_mask |= (u64)v << 32; + } } /** Modified: stable/11/sys/dev/cxgbe/common/t4_msg.h ============================================================================== --- stable/11/sys/dev/cxgbe/common/t4_msg.h Sun Apr 28 19:07:31 2019 (r346854) +++ stable/11/sys/dev/cxgbe/common/t4_msg.h Sun Apr 28 19:52:48 2019 (r346855) @@ -195,6 +195,30 @@ static inline int act_open_has_tid(int status) status != CPL_ERR_CONN_EXIST); } +/* + * Convert an ACT_OPEN_RPL status to an errno. + */ +static inline int +act_open_rpl_status_to_errno(int status) +{ + + switch (status) { + case CPL_ERR_CONN_RESET: + return (ECONNREFUSED); + case CPL_ERR_ARP_MISS: + return (EHOSTUNREACH); + case CPL_ERR_CONN_TIMEDOUT: + return (ETIMEDOUT); + case CPL_ERR_TCAM_FULL: + return (EAGAIN); + case CPL_ERR_CONN_EXIST: + return (EAGAIN); + default: + return (EIO); + } +} + + enum { CPL_CONN_POLICY_AUTO = 0, CPL_CONN_POLICY_ASK = 1, @@ -1038,6 +1062,14 @@ struct cpl_abort_req { __u8 rsvd2[6]; }; +struct cpl_abort_req_core { + union opcode_tid ot; + __be32 rsvd0; + __u8 rsvd1; + __u8 cmd; + __u8 rsvd2[6]; +}; + struct cpl_abort_rpl_rss { RSS_HDR union opcode_tid ot; @@ -1053,6 +1085,14 @@ struct cpl_abort_rpl_rss6 { struct cpl_abort_rpl { WR_HDR; + union opcode_tid ot; + __be32 rsvd0; + __u8 rsvd1; + __u8 cmd; + __u8 rsvd2[6]; +}; + +struct cpl_abort_rpl_core { union opcode_tid ot; __be32 rsvd0; __u8 rsvd1; Modified: stable/11/sys/dev/cxgbe/common/t4_regs_values.h ============================================================================== --- stable/11/sys/dev/cxgbe/common/t4_regs_values.h Sun Apr 28 19:07:31 2019 (r346854) +++ stable/11/sys/dev/cxgbe/common/t4_regs_values.h Sun Apr 28 19:52:48 2019 (r346855) @@ -290,6 +290,17 @@ #define W_FT_MPSHITTYPE 3 #define W_FT_FRAGMENTATION 1 +#define M_FT_FCOE ((1ULL << W_FT_FCOE) - 1) +#define M_FT_PORT ((1ULL << W_FT_PORT) - 1) +#define M_FT_VNIC_ID ((1ULL << W_FT_VNIC_ID) - 1) +#define M_FT_VLAN ((1ULL << W_FT_VLAN) - 1) +#define M_FT_TOS ((1ULL << W_FT_TOS) - 1) +#define M_FT_PROTOCOL ((1ULL << W_FT_PROTOCOL) - 1) +#define M_FT_ETHERTYPE ((1ULL << W_FT_ETHERTYPE) - 1) +#define M_FT_MACMATCH ((1ULL << W_FT_MACMATCH) - 1) +#define M_FT_MPSHITTYPE ((1ULL << W_FT_MPSHITTYPE) - 1) +#define M_FT_FRAGMENTATION ((1ULL << W_FT_FRAGMENTATION) - 1) + /* * Some of the Compressed Filter Tuple fields have internal structure. These * bit shifts/masks describe those structures. All shifts are relative to the Copied: stable/11/sys/dev/cxgbe/firmware/t5fw_cfg_hashfilter.txt (from r333620, head/sys/dev/cxgbe/firmware/t5fw_cfg_hashfilter.txt) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/11/sys/dev/cxgbe/firmware/t5fw_cfg_hashfilter.txt Sun Apr 28 19:52:48 2019 (r346855, copy of r333620, head/sys/dev/cxgbe/firmware/t5fw_cfg_hashfilter.txt) @@ -0,0 +1,300 @@ +# Firmware configuration file. +# +# Global limits (some are hardware limits, others are due to the firmware). +# nvi = 128 virtual interfaces +# niqflint = 1023 ingress queues with freelists and/or interrupts +# nethctrl = 64K Ethernet or ctrl egress queues +# neq = 64K egress queues of all kinds, including freelists +# nexactf = 512 MPS TCAM entries, can oversubscribe. +# + +[global] + rss_glb_config_mode = basicvirtual + rss_glb_config_options = tnlmapen,hashtoeplitz,tnlalllkp + + # PL_TIMEOUT register + pl_timeout_value = 10000 # the timeout value in units of us + + # SGE_THROTTLE_CONTROL + bar2throttlecount = 500 # bar2throttlecount in us + + sge_timer_value = 1, 5, 10, 50, 100, 200 # SGE_TIMER_VALUE* in usecs + + reg[0x1124] = 0x00000400/0x00000400 # SGE_CONTROL2, enable VFIFO; if + # SGE_VFIFO_SIZE is not set, then + # firmware will set it up in function + # of number of egress queues used + + reg[0x1130] = 0x00d5ffeb # SGE_DBP_FETCH_THRESHOLD, fetch + # threshold set to queue depth + # minus 128-entries for FL and HP + # queues, and 0xfff for LP which + # prompts the firmware to set it up + # in function of egress queues + # used + + reg[0x113c] = 0x0002ffc0 # SGE_VFIFO_SIZE, set to 0x2ffc0 which + # prompts the firmware to set it up in + # function of number of egress queues + # used + + # enable TP_OUT_CONFIG.IPIDSPLITMODE + reg[0x7d04] = 0x00010000/0x00010000 + + # disable TP_PARA_REG3.RxFragEn + reg[0x7d6c] = 0x00000000/0x00007000 + + # enable TP_PARA_REG6.EnableCSnd + reg[0x7d78] = 0x00000400/0x00000000 + + reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT + + filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe + filterMask = port, protocol + + tp_pmrx = 20, 512 + tp_pmrx_pagesize = 16K + + # TP number of RX channels (0 = auto) + tp_nrxch = 0 + + tp_pmtx = 40, 512 + tp_pmtx_pagesize = 64K + + # TP number of TX channels (0 = auto) + tp_ntxch = 0 + + # TP OFLD MTUs + tp_mtus = 88, 256, 512, 576, 808, 1024, 1280, 1488, 1500, 2002, 2048, 4096, 4352, 8192, 9000, 9600 + + # TP_GLOBAL_CONFIG + reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable + + # TP_PC_CONFIG + reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError + + # TP_PC_CONFIG2 + reg[0x7d4c] = 0x00010000/0x00010000 # set DisableNewPshFlag + + # TP_PARA_REG0 + reg[0x7d60] = 0x06000000/0x07000000 # set InitCWND to 6 + + # TP_PARA_REG3 + reg[0x7d6c] = 0x28000000/0x28000000 # set EnableTnlCngHdr + # set RxMacCheck (Note: + # Only for hash filter, + # no tcp offload) + + # TP_PIO_ADDR:TP_RX_LPBK + reg[tp_pio:0x28] = 0x00208208/0x00ffffff # set commit limits to 8 + + # MC configuration + mc_mode_brc[0] = 0 # mc0 - 1: enable BRC, 0: enable RBC + mc_mode_brc[1] = 0 # mc1 - 1: enable BRC, 0: enable RBC + + # ULP_TX_CONFIG + reg[0x8dc0] = 0x00000004/0x00000004 # Enable more error msg for ... + # TPT error. + +# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by +# these 4 PFs only. +[function "0"] + nvf = 4 + wx_caps = all + r_caps = all + nvi = 2 + rssnvi = 2 + niqflint = 4 + nethctrl = 4 + neq = 8 + nexactf = 4 + cmask = all + pmask = 0x1 + +[function "1"] + nvf = 4 + wx_caps = all + r_caps = all + nvi = 2 + rssnvi = 2 + niqflint = 4 + nethctrl = 4 + neq = 8 + nexactf = 4 + cmask = all + pmask = 0x2 + +[function "2"] + nvf = 4 + wx_caps = all + r_caps = all + nvi = 2 + rssnvi = 2 + niqflint = 4 + nethctrl = 4 + neq = 8 + nexactf = 4 + cmask = all + pmask = 0x4 + +[function "3"] + nvf = 4 + wx_caps = all + r_caps = all + nvi = 2 + rssnvi = 2 + niqflint = 4 + nethctrl = 4 + neq = 8 + nexactf = 4 + cmask = all + pmask = 0x8 + +# PF4 is the resource-rich PF that the bus/nexus driver attaches to. +# It gets 32 MSI/128 MSI-X vectors. +[function "4"] + wx_caps = all + r_caps = all + nvi = 32 + rssnvi = 8 + niqflint = 512 + nethctrl = 1024 + neq = 2048 + nqpcq = 8192 + nexactf = 456 + cmask = all + pmask = all + + # driver will mask off features it won't use + protocol = nic_hashfilter + + tp_l2t = 4096 + + # TCAM has 8K cells; each region must start at a multiple of 128 cell. + # Each entry in these categories takes 4 cells each. nhash will use the + # TCAM iff there is room left (that is, the rest don't add up to 2048). + nroute = 32 + nclip = 32 + nfilter = 1008 + nserver = 512 + nhash = 524288 + +# PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors. +# Not used right now. +[function "5"] + nvi = 1 + rssnvi = 0 + +# PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors. +# Not used right now. +[function "6"] + nvi = 1 + rssnvi = 0 + +# The following function, 1023, is not an actual PCIE function but is used to +# configure and reserve firmware internal resources that come from the global +# resource pool. +[function "1023"] + wx_caps = all + r_caps = all + nvi = 4 + rssnvi = 0 + cmask = all + pmask = all + nexactf = 8 + nfilter = 16 + +# For Virtual functions, we only allow NIC functionality and we only allow +# access to one port (1 << PF). Note that because of limitations in the +# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL +# and GTS registers, the number of Ingress and Egress Queues must be a power +# of 2. +# +[function "0/*"] + wx_caps = 0x82 + r_caps = 0x86 + nvi = 1 + rssnvi = 1 + niqflint = 2 + nethctrl = 2 + neq = 4 + nexactf = 2 + cmask = all + pmask = 0x1 + +[function "1/*"] + wx_caps = 0x82 + r_caps = 0x86 + nvi = 1 + rssnvi = 1 + niqflint = 2 + nethctrl = 2 + neq = 4 + nexactf = 2 + cmask = all + pmask = 0x2 + +[function "2/*"] + wx_caps = 0x82 + r_caps = 0x86 + nvi = 1 + rssnvi = 1 + niqflint = 2 + nethctrl = 2 + neq = 4 + nexactf = 2 + cmask = all + pmask = 0x4 + +[function "3/*"] + wx_caps = 0x82 + r_caps = 0x86 + nvi = 1 + rssnvi = 1 + niqflint = 2 + nethctrl = 2 + neq = 4 + nexactf = 2 + cmask = all + pmask = 0x8 + +# MPS has 192K buffer space for ingress packets from the wire as well as +# loopback path of the L2 switch. +[port "0"] + dcb = none + bg_mem = 25 + lpbk_mem = 25 + hwm = 30 + lwm = 15 + dwm = 30 + +[port "1"] + dcb = none + bg_mem = 25 + lpbk_mem = 25 + hwm = 30 + lwm = 15 + dwm = 30 + +[port "2"] + dcb = none + bg_mem = 25 + lpbk_mem = 25 + hwm = 30 + lwm = 15 + dwm = 30 + +[port "3"] + dcb = none + bg_mem = 25 + lpbk_mem = 25 + hwm = 30 + lwm = 15 + dwm = 30 + +[fini] + version = 0x1 + checksum = 0x380a0a4 +# +# $FreeBSD$ +# Copied: stable/11/sys/dev/cxgbe/firmware/t6fw_cfg_hashfilter.txt (from r333394, head/sys/dev/cxgbe/firmware/t6fw_cfg_hashfilter.txt) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/11/sys/dev/cxgbe/firmware/t6fw_cfg_hashfilter.txt Sun Apr 28 19:52:48 2019 (r346855, copy of r333394, head/sys/dev/cxgbe/firmware/t6fw_cfg_hashfilter.txt) @@ -0,0 +1,265 @@ +# Firmware configuration file. +# +# Global limits (some are hardware limits, others are due to the firmware). +# nvi = 128 virtual interfaces +# niqflint = 1023 ingress queues with freelists and/or interrupts +# nethctrl = 64K Ethernet or ctrl egress queues +# neq = 64K egress queues of all kinds, including freelists +# nexactf = 512 MPS TCAM entries, can oversubscribe. + +[global] + rss_glb_config_mode = basicvirtual + rss_glb_config_options = tnlmapen,hashtoeplitz,tnlalllkp + + # PL_TIMEOUT register + pl_timeout_value = 200 # the timeout value in units of us + + sge_timer_value = 1, 5, 10, 50, 100, 200 # SGE_TIMER_VALUE* in usecs + + reg[0x10c4] = 0x20000000/0x20000000 # GK_CONTROL, enable 5th thread + + reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT + + #Tick granularities in kbps + tsch_ticks = 100000, 10000, 1000, 10 + + filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe + filterMask = port, protocol + + tp_pmrx = 20, 512 + tp_pmrx_pagesize = 16K + + # TP number of RX channels (0 = auto) + tp_nrxch = 0 + + tp_pmtx = 40, 512 + tp_pmtx_pagesize = 64K + + # TP number of TX channels (0 = auto) + tp_ntxch = 0 + + # TP OFLD MTUs + tp_mtus = 88, 256, 512, 576, 808, 1024, 1280, 1488, 1500, 2002, 2048, 4096, 4352, 8192, 9000, 9600 + + # enable TP_OUT_CONFIG.IPIDSPLITMODE and CRXPKTENC + reg[0x7d04] = 0x00010008/0x00010008 + + # TP_GLOBAL_CONFIG + reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable + + # TP_PC_CONFIG + reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError + + # TP_PC_CONFIG2 + reg[0x7d4c] = 0x00010000/0x00010000 # set DisableNewPshFlag + + # TP_PARA_REG0 + reg[0x7d60] = 0x06000000/0x07000000 # set InitCWND to 6 + + # TP_PARA_REG3 + reg[0x7d6c] = 0x28000000/0x28000000 # set EnableTnlCngHdr + # set RxMacCheck (Note: + # Only for hash filter, + # no tcp offload) + + # LE_DB_CONFIG + reg[0x19c04] = 0x00000000/0x02040000 # LE IPv4 compression disabled + # EXTN_HASH_IPV4 Disable + + # LE_DB_RSP_CODE_0 + reg[0x19c74] = 0x00000004/0x0000000f # TCAM_ACTV_HIT = 4 + + # LE_DB_RSP_CODE_1 + reg[0x19c78] = 0x08000000/0x0e000000 # HASH_ACTV_HIT = 4 + + # LE_DB_HASH_CONFIG + reg[0x19c28] = 0x00800000/0x01f00000 # LE Hash bucket size 8, + + # MC configuration + mc_mode_brc[0] = 0 # mc0 - 1: enable BRC, 0: enable RBC + +# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by +# these 4 PFs only. +[function "0"] + nvf = 4 + wx_caps = all + r_caps = all + nvi = 2 + rssnvi = 2 + niqflint = 4 + nethctrl = 4 + neq = 8 + nexactf = 4 + cmask = all + pmask = 0x1 + +[function "1"] + nvf = 4 + wx_caps = all + r_caps = all + nvi = 2 + rssnvi = 2 + niqflint = 4 + nethctrl = 4 + neq = 8 + nexactf = 4 + cmask = all + pmask = 0x2 + +[function "2"] + nvf = 4 + wx_caps = all + r_caps = all + nvi = 2 + rssnvi = 2 + niqflint = 4 + nethctrl = 4 + neq = 8 + nexactf = 4 + cmask = all + pmask = 0x4 + +[function "3"] + nvf = 4 + wx_caps = all + r_caps = all + nvi = 2 + rssnvi = 2 + niqflint = 4 + nethctrl = 4 + neq = 8 + nexactf = 4 + cmask = all + pmask = 0x8 + +# PF4 is the resource-rich PF that the bus/nexus driver attaches to. +# It gets 32 MSI/128 MSI-X vectors. +[function "4"] + wx_caps = all + r_caps = all + nvi = 32 + rssnvi = 8 + niqflint = 512 + nethctrl = 1024 + neq = 2048 + nqpcq = 8192 + nexactf = 456 + cmask = all + pmask = all + nclip = 320 + + # TCAM has 6K cells; each region must start at a multiple of 128 cell. + # Each entry in these categories takes 2 cells each. nhash will use the + # TCAM iff there is room left (that is, the rest don't add up to 3072). + nfilter = 2032 + nserver = 512 + nhpfilter = 0 + nhash = 524288 + protocol = nic_hashfilter + tp_l2t = 4096 + +# PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors. +# Not used right now. +[function "5"] + nvi = 1 + rssnvi = 0 + +# PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors. +# Not used right now. +[function "6"] + nvi = 1 + rssnvi = 0 + +# The following function, 1023, is not an actual PCIE function but is used to +# configure and reserve firmware internal resources that come from the global +# resource pool. +# +[function "1023"] + wx_caps = all + r_caps = all + nvi = 4 + rssnvi = 0 + cmask = all + pmask = all + nexactf = 8 + nfilter = 16 + + +# For Virtual functions, we only allow NIC functionality and we only allow +# access to one port (1 << PF). Note that because of limitations in the +# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL +# and GTS registers, the number of Ingress and Egress Queues must be a power +# of 2. +# +[function "0/*"] + wx_caps = 0x82 + r_caps = 0x86 + nvi = 1 + rssnvi = 1 + niqflint = 2 + nethctrl = 2 + neq = 4 + nexactf = 2 + cmask = all + pmask = 0x1 + +[function "1/*"] + wx_caps = 0x82 + r_caps = 0x86 + nvi = 1 + rssnvi = 1 + niqflint = 2 + nethctrl = 2 + neq = 4 + nexactf = 2 + cmask = all + pmask = 0x2 + +[function "2/*"] + wx_caps = 0x82 + r_caps = 0x86 + nvi = 1 + rssnvi = 1 + niqflint = 2 + nethctrl = 2 + neq = 4 + nexactf = 2 + cmask = all + pmask = 0x1 + +[function "3/*"] + wx_caps = 0x82 + r_caps = 0x86 + nvi = 1 + rssnvi = 1 + niqflint = 2 + nethctrl = 2 + neq = 4 + nexactf = 2 + cmask = all + pmask = 0x2 + +# MPS has 192K buffer space for ingress packets from the wire as well as +# loopback path of the L2 switch. +[port "0"] + dcb = none + #bg_mem = 25 + #lpbk_mem = 25 + hwm = 60 + lwm = 15 + dwm = 30 + +[port "1"] + dcb = none + #bg_mem = 25 + #lpbk_mem = 25 + hwm = 60 + lwm = 15 + dwm = 30 + +[fini] + version = 0x1 + checksum = 0xb577311e +# +# $FreeBSD$ +# Modified: stable/11/sys/dev/cxgbe/offload.h ============================================================================== --- stable/11/sys/dev/cxgbe/offload.h Sun Apr 28 19:07:31 2019 (r346854) +++ stable/11/sys/dev/cxgbe/offload.h Sun Apr 28 19:52:48 2019 (r346855) @@ -30,6 +30,9 @@ #ifndef __T4_OFFLOAD_H__ #define __T4_OFFLOAD_H__ +#include <sys/param.h> +#include <sys/proc.h> +#include <sys/condvar.h> #define INIT_ULPTX_WRH(w, wrlen, atomic, tid) do { \ (w)->wr_hi = htonl(V_FW_WR_OP(FW_ULPTX_WR) | V_FW_WR_ATOMIC(atomic)); \ @@ -98,10 +101,16 @@ struct tid_info { u_int atids_in_use; struct mtx ftid_lock __aligned(CACHE_LINE_SIZE); + struct cv ftid_cv; struct filter_entry *ftid_tab; u_int nftids; u_int ftid_base; u_int ftids_in_use; + + struct mtx hftid_lock __aligned(CACHE_LINE_SIZE); + struct cv hftid_cv; + void **hftid_tab; + /* ntids, tids_in_use */ struct mtx etid_lock __aligned(CACHE_LINE_SIZE); struct etid_entry *etid_tab; Copied and modified: stable/11/sys/dev/cxgbe/t4_filter.c (from r333153, head/sys/dev/cxgbe/t4_filter.c) ============================================================================== --- head/sys/dev/cxgbe/t4_filter.c Tue May 1 20:17:22 2018 (r333153, copy source) +++ stable/11/sys/dev/cxgbe/t4_filter.c Sun Apr 28 19:52:48 2019 (r346855) @@ -47,60 +47,93 @@ __FBSDID("$FreeBSD$"); #include "common/common.h" #include "common/t4_msg.h" #include "common/t4_regs.h" +#include "common/t4_regs_values.h" +#include "common/t4_tcb.h" #include "t4_l2t.h" +#include "t4_smt.h" struct filter_entry { - uint32_t valid:1; /* filter allocated and valid */ - uint32_t locked:1; /* filter is administratively locked */ - uint32_t pending:1; /* filter action is pending firmware reply */ - uint32_t smtidx:8; /* Source MAC Table index for smac */ - struct l2t_entry *l2t; /* Layer Two Table entry for dmac */ + uint32_t valid:1; /* filter allocated and valid */ + uint32_t locked:1; /* filter is administratively locked or busy */ + uint32_t pending:1; /* filter action is pending firmware reply */ + int tid; /* tid of the filter TCB */ + struct l2t_entry *l2te; /* L2 table entry for DMAC rewrite */ + struct smt_entry *smt; /* SMT entry for SMAC rewrite */ - struct t4_filter_specification fs; + struct t4_filter_specification fs; }; -static uint32_t -fconf_iconf_to_mode(uint32_t fconf, uint32_t iconf) +static void free_filter_resources(struct filter_entry *); +static int get_hashfilter(struct adapter *, struct t4_filter *); +static int set_hashfilter(struct adapter *, struct t4_filter *, uint64_t, + struct l2t_entry *, struct smt_entry *); +static int del_hashfilter(struct adapter *, struct t4_filter *); +static int configure_hashfilter_tcb(struct adapter *, struct filter_entry *); + +static int +alloc_hftid_tab(struct tid_info *t, int flags) { - uint32_t mode; - mode = T4_FILTER_IPv4 | T4_FILTER_IPv6 | T4_FILTER_IP_SADDR | - T4_FILTER_IP_DADDR | T4_FILTER_IP_SPORT | T4_FILTER_IP_DPORT; + MPASS(t->ntids > 0); + MPASS(t->hftid_tab == NULL); - if (fconf & F_FRAGMENTATION) - mode |= T4_FILTER_IP_FRAGMENT; + t->hftid_tab = malloc(sizeof(*t->hftid_tab) * t->ntids, M_CXGBE, + M_ZERO | flags); + if (t->hftid_tab == NULL) + return (ENOMEM); + mtx_init(&t->hftid_lock, "T4 hashfilters", 0, MTX_DEF); + cv_init(&t->hftid_cv, "t4hfcv"); - if (fconf & F_MPSHITTYPE) - mode |= T4_FILTER_MPS_HIT_TYPE; + return (0); +} - if (fconf & F_MACMATCH) - mode |= T4_FILTER_MAC_IDX; +void +free_hftid_tab(struct tid_info *t) +{ + int i; - if (fconf & F_ETHERTYPE) - mode |= T4_FILTER_ETH_TYPE; + if (t->hftid_tab != NULL) { + MPASS(t->ntids > 0); + for (i = 0; t->tids_in_use > 0 && i < t->ntids; i++) { + if (t->hftid_tab[i] == NULL) + continue; + free(t->hftid_tab[i], M_CXGBE); + t->tids_in_use--; + } + free(t->hftid_tab, M_CXGBE); + t->hftid_tab = NULL; + } - if (fconf & F_PROTOCOL) - mode |= T4_FILTER_IP_PROTO; + if (mtx_initialized(&t->hftid_lock)) { + mtx_destroy(&t->hftid_lock); + cv_destroy(&t->hftid_cv); + } +} - if (fconf & F_TOS) - mode |= T4_FILTER_IP_TOS; +static void +insert_hftid(struct adapter *sc, int tid, void *ctx, int ntids) +{ + struct tid_info *t = &sc->tids; - if (fconf & F_VLAN) - mode |= T4_FILTER_VLAN; + t->hftid_tab[tid] = ctx; + atomic_add_int(&t->tids_in_use, ntids); +} - if (fconf & F_VNIC_ID) { - mode |= T4_FILTER_VNIC; - if (iconf & F_VNIC) - mode |= T4_FILTER_IC_VNIC; - } +static void * +lookup_hftid(struct adapter *sc, int tid) +{ + struct tid_info *t = &sc->tids; - if (fconf & F_PORT) - mode |= T4_FILTER_PORT; + return (t->hftid_tab[tid]); +} - if (fconf & F_FCOE) - mode |= T4_FILTER_FCoE; +static void +remove_hftid(struct adapter *sc, int tid, int ntids) +{ + struct tid_info *t = &sc->tids; - return (mode); + t->hftid_tab[tid] = NULL; + atomic_subtract_int(&t->tids_in_use, ntids); } static uint32_t @@ -150,7 +183,8 @@ mode_to_iconf(uint32_t mode) return (0); } -static int check_fspec_against_fconf_iconf(struct adapter *sc, +static int +check_fspec_against_fconf_iconf(struct adapter *sc, struct t4_filter_specification *fs) { struct tp_params *tpp = &sc->params.tp; @@ -204,15 +238,38 @@ static int check_fspec_against_fconf_iconf(struct adap int get_filter_mode(struct adapter *sc, uint32_t *mode) { - struct tp_params *tpp = &sc->params.tp; + struct tp_params *tp = &sc->params.tp; + uint64_t mask; - /* - * We trust the cached values of the relevant TP registers. This means - * things work reliably only if writes to those registers are always via - * t4_set_filter_mode_. - */ - *mode = fconf_iconf_to_mode(tpp->vlan_pri_map, tpp->ingress_config); + /* Non-zero incoming value in mode means "hashfilter mode". */ + mask = *mode ? tp->hash_filter_mask : UINT64_MAX; + /* Always */ + *mode = T4_FILTER_IPv4 | T4_FILTER_IPv6 | T4_FILTER_IP_SADDR | + T4_FILTER_IP_DADDR | T4_FILTER_IP_SPORT | T4_FILTER_IP_DPORT; + +#define CHECK_FIELD(fconf_bit, field_shift, field_mask, mode_bit) do { \ + if (tp->vlan_pri_map & (fconf_bit)) { \ + MPASS(tp->field_shift >= 0); \ + if ((mask >> tp->field_shift & field_mask) == field_mask) \ + *mode |= (mode_bit); \ + } \ +} while (0) + + CHECK_FIELD(F_FRAGMENTATION, frag_shift, M_FT_FRAGMENTATION, T4_FILTER_IP_FRAGMENT); + CHECK_FIELD(F_MPSHITTYPE, matchtype_shift, M_FT_MPSHITTYPE, T4_FILTER_MPS_HIT_TYPE); + CHECK_FIELD(F_MACMATCH, macmatch_shift, M_FT_MACMATCH, T4_FILTER_MAC_IDX); + CHECK_FIELD(F_ETHERTYPE, ethertype_shift, M_FT_ETHERTYPE, T4_FILTER_ETH_TYPE); + CHECK_FIELD(F_PROTOCOL, protocol_shift, M_FT_PROTOCOL, T4_FILTER_IP_PROTO); + CHECK_FIELD(F_TOS, tos_shift, M_FT_TOS, T4_FILTER_IP_TOS); + CHECK_FIELD(F_VLAN, vlan_shift, M_FT_VLAN, T4_FILTER_VLAN); + CHECK_FIELD(F_VNIC_ID, vnic_shift, M_FT_VNIC_ID , T4_FILTER_VNIC); + if (tp->ingress_config & F_VNIC) + *mode |= T4_FILTER_IC_VNIC; + CHECK_FIELD(F_PORT, port_shift, M_FT_PORT , T4_FILTER_PORT); + CHECK_FIELD(F_FCOE, fcoe_shift, M_FT_FCOE , T4_FILTER_FCoE); +#undef CHECK_FIELD + return (0); } @@ -230,6 +287,10 @@ set_filter_mode(struct adapter *sc, uint32_t mode) * already set to the correct value for the requested filter * mode. It's not clear if it's safe to write to this register * on the fly. (And we trust the cached value of the register). *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201904281952.x3SJqnxt029847>