Date: Mon, 8 Sep 2014 04:52:19 GMT From: John Baldwin <jhb@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 1199738 for review Message-ID: <201409080452.s884qJNO029308@skunkworks.freebsd.org>
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http://p4web.freebsd.org/@@1199738?ac=10 Change 1199738 by jhb@jhb_ralph on 2014/09/03 16:38:05 Move some prototypes to headers and some other cleanups. Affected files ... .. //depot/projects/smpng/sys/amd64/amd64/identcpu.c#54 edit .. //depot/projects/smpng/sys/amd64/amd64/machdep.c#130 edit .. //depot/projects/smpng/sys/amd64/include/md_var.h#31 edit .. //depot/projects/smpng/sys/i386/i386/identcpu.c#81 edit .. //depot/projects/smpng/sys/i386/i386/initcpu.c#46 edit .. //depot/projects/smpng/sys/i386/i386/machdep.c#192 edit .. //depot/projects/smpng/sys/i386/i386/trap.c#143 edit .. //depot/projects/smpng/sys/i386/include/md_var.h#42 edit .. //depot/projects/smpng/sys/pc98/pc98/machdep.c#67 edit Differences ... ==== //depot/projects/smpng/sys/amd64/amd64/identcpu.c#54 (text+ko) ==== @@ -64,15 +64,8 @@ #include <amd64/vmm/intel/vmx_controls.h> #include <x86/isa/icu.h> -/* XXX - should be in header file: */ -void printcpuinfo(void); -void identify_cpu(void); -void earlysetcpuclass(void); -void panicifcpuunsupported(void); - static u_int find_cpu_vendor_id(void); static void print_AMD_info(void); -static void print_AMD_assoc(int i); static void print_via_padlock_info(void); static void print_vmx_info(void); ==== //depot/projects/smpng/sys/amd64/amd64/machdep.c#130 (text+ko) ==== @@ -151,10 +151,6 @@ extern u_int64_t hammer_time(u_int64_t, u_int64_t); -extern void printcpuinfo(void); /* XXX header file */ -extern void identify_cpu(void); -extern void panicifcpuunsupported(void); - #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) ==== //depot/projects/smpng/sys/amd64/include/md_var.h#31 (text+ko) ==== @@ -105,14 +105,17 @@ void gsbase_load_fault(void) __asm(__STRING(gsbase_load_fault)); void dump_add_page(vm_paddr_t); void dump_drop_page(vm_paddr_t); +void identify_cpu(void); void initializecpu(void); void initializecpucache(void); void fillw(int /*u_short*/ pat, void *base, size_t cnt); void fpstate_drop(struct thread *td); int is_physical_memory(vm_paddr_t addr); int isa_nmi(int cd); +void panicifcpuunsupported(void); void pagecopy(void *from, void *to); void pagezero(void *addr); +void printcpuinfo(void); void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int ist); int user_dbreg_trap(void); void minidumpsys(struct dumperinfo *); ==== //depot/projects/smpng/sys/i386/i386/identcpu.c#81 (text+ko) ==== @@ -64,30 +64,16 @@ #define IDENTBLUE_IBMCPU 1 #define IDENTBLUE_CYRIXM2 2 -/* XXX - should be in header file: */ -void printcpuinfo(void); -void finishidentcpu(void); -void earlysetcpuclass(void); -#if defined(I586_CPU) && defined(CPU_WT_ALLOC) -void enable_K5_wt_alloc(void); -void enable_K6_wt_alloc(void); -void enable_K6_2_wt_alloc(void); -#endif -void panicifcpuunsupported(void); - static void identifycyrix(void); static void init_exthigh(void); static u_int find_cpu_vendor_id(void); static void print_AMD_info(void); static void print_INTEL_info(void); static void print_INTEL_TLB(u_int data); -static void print_AMD_assoc(int i); static void print_transmeta_info(void); static void print_via_padlock_info(void); int cpu_class; -u_int cpu_exthigh; /* Highest arg to extended CPUID */ -u_int cyrix_did; /* Device ID of Cyrix CPU */ char machine[] = MACHINE; SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "Machine class"); @@ -161,10 +147,6 @@ #endif }; -#if defined(I586_CPU) && !defined(NO_F00F_HACK) -int has_f00f_bug = 0; /* Initialized so that it can be patched. */ -#endif - static void init_exthigh(void) { ==== //depot/projects/smpng/sys/i386/i386/initcpu.c#46 (text+ko) ==== @@ -48,12 +48,6 @@ #define CPU_ENABLE_SSE #endif -#if defined(I586_CPU) && defined(CPU_WT_ALLOC) -void enable_K5_wt_alloc(void); -void enable_K6_wt_alloc(void); -void enable_K6_2_wt_alloc(void); -#endif - #ifdef I486_CPU static void init_5x86(void); static void init_bluelightning(void); @@ -81,36 +75,36 @@ */ static int hw_clflush_disable = -1; -/* Must *NOT* be BSS or locore will bzero these after setting them */ -int cpu = 0; /* Are we 386, 386sx, 486, etc? */ -u_int cpu_feature = 0; /* Feature flags */ -u_int cpu_feature2 = 0; /* Feature flags */ -u_int amd_feature = 0; /* AMD feature flags */ -u_int amd_feature2 = 0; /* AMD feature flags */ -u_int amd_pminfo = 0; /* AMD advanced power management info */ -u_int via_feature_rng = 0; /* VIA RNG features */ -u_int via_feature_xcrypt = 0; /* VIA ACE features */ -u_int cpu_high = 0; /* Highest arg to CPUID */ -u_int cpu_id = 0; /* Stepping ID */ -u_int cpu_procinfo = 0; /* HyperThreading Info / Brand Index / CLFUSH */ -u_int cpu_procinfo2 = 0; /* Multicore info */ -char cpu_vendor[20] = ""; /* CPU Origin code */ -u_int cpu_vendor_id = 0; /* CPU vendor ID */ +int cpu; /* Are we 386, 386sx, 486, etc? */ +u_int cpu_feature; /* Feature flags */ +u_int cpu_feature2; /* Feature flags */ +u_int amd_feature; /* AMD feature flags */ +u_int amd_feature2; /* AMD feature flags */ +u_int amd_pminfo; /* AMD advanced power management info */ +u_int via_feature_rng; /* VIA RNG features */ +u_int via_feature_xcrypt; /* VIA ACE features */ +u_int cpu_high; /* Highest arg to CPUID */ +u_int cpu_exthigh; /* Highest arg to extended CPUID */ +u_int cpu_id; /* Stepping ID */ +u_int cpu_procinfo; /* HyperThreading Info / Brand Index / CLFUSH */ +u_int cpu_procinfo2; /* Multicore info */ +char cpu_vendor[20]; /* CPU Origin code */ +u_int cpu_vendor_id; /* CPU vendor ID */ +#ifdef CPU_ENABLE_SSE +u_int cpu_fxsr; /* SSE enabled */ +u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */ +#endif u_int cpu_clflush_line_size = 32; u_int cpu_mon_mwait_flags; /* MONITOR/MWAIT flags (CPUID.05H.ECX) */ u_int cpu_mon_min_size; /* MONITOR minimum range size, bytes */ u_int cpu_mon_max_size; /* MONITOR minimum range size, bytes */ +u_int cyrix_did; /* Device ID of Cyrix CPU */ SYSCTL_UINT(_hw, OID_AUTO, via_feature_rng, CTLFLAG_RD, &via_feature_rng, 0, "VIA RNG feature available in CPU"); SYSCTL_UINT(_hw, OID_AUTO, via_feature_xcrypt, CTLFLAG_RD, &via_feature_xcrypt, 0, "VIA xcrypt feature available in CPU"); -#ifdef CPU_ENABLE_SSE -u_int cpu_fxsr; /* SSE enabled */ -u_int cpu_mxcsr_mask; /* valid bits in mxcsr */ -#endif - #ifdef I486_CPU /* * IBM Blue Lightning ==== //depot/projects/smpng/sys/i386/i386/machdep.c#192 (text+ko) ==== @@ -180,10 +180,6 @@ extern void init386(int first); extern void dblfault_handler(void); -extern void printcpuinfo(void); /* XXX header file */ -extern void finishidentcpu(void); -extern void panicifcpuunsupported(void); - #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) @@ -1665,10 +1661,6 @@ struct region_descriptor r_gdt, r_idt; /* table descriptors */ struct mtx dt_lock; /* lock for GDT and LDT */ -#if defined(I586_CPU) && !defined(NO_F00F_HACK) -extern int has_f00f_bug; -#endif - static struct i386tss dblfault_tss; static char dblfault_stack[PAGE_SIZE]; ==== //depot/projects/smpng/sys/i386/i386/trap.c#143 (text+ko) ==== @@ -153,7 +153,7 @@ }; #if defined(I586_CPU) && !defined(NO_F00F_HACK) -extern int has_f00f_bug; +int has_f00f_bug = 0; /* Initialized so that it can be patched. */ #endif #ifdef KDB ==== //depot/projects/smpng/sys/i386/include/md_var.h#42 (text+ko) ==== @@ -56,10 +56,13 @@ extern u_int cpu_procinfo2; extern char cpu_vendor[]; extern u_int cpu_vendor_id; -extern u_int cyrix_did; extern u_int cpu_mon_mwait_flags; extern u_int cpu_mon_min_size; extern u_int cpu_mon_max_size; +extern u_int cyrix_did; +#if defined(I586_CPU) && !defined(NO_F00F_HACK) +extern int has_f00f_bug; +#endif extern char kstack[]; extern char sigcode[]; extern int szsigcode; @@ -94,15 +97,23 @@ void doreti_popl_fs_fault(void) __asm(__STRING(doreti_popl_fs_fault)); void dump_add_page(vm_paddr_t); void dump_drop_page(vm_paddr_t); -void initializecpu(void); +void finishidentcpu(void); +#if defined(I586_CPU) && defined(CPU_WT_ALLOC) +void enable_K5_wt_alloc(void); +void enable_K6_wt_alloc(void); +void enable_K6_2_wt_alloc(void); +#endif void enable_sse(void); void fillw(int /*u_short*/ pat, void *base, size_t cnt); +void initializecpu(void); void i686_pagezero(void *addr); void sse2_pagezero(void *addr); void init_AMD_Elan_sc520(void); int is_physical_memory(vm_paddr_t addr); int isa_nmi(int cd); vm_paddr_t kvtop(void *addr); +void panicifcpuunsupported(void); +void printcpuinfo(void); void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int selec); int user_dbreg_trap(void); void minidumpsys(struct dumperinfo *); ==== //depot/projects/smpng/sys/pc98/pc98/machdep.c#67 (text+ko) ==== @@ -149,10 +149,6 @@ extern void init386(int first); extern void dblfault_handler(void); -extern void printcpuinfo(void); /* XXX header file */ -extern void finishidentcpu(void); -extern void panicifcpuunsupported(void); - #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
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