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Date:      Thu, 27 Feb 2020 18:49:49 +0000 (UTC)
From:      Dimitry Andric <dim@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-projects@freebsd.org
Subject:   svn commit: r358396 - in projects/clang1000-import/contrib/llvm-project/llvm: include/llvm/MC lib/MC lib/Target/ARM/MCTargetDesc
Message-ID:  <202002271849.01RInnl8006219@repo.freebsd.org>

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Author: dim
Date: Thu Feb 27 18:49:49 2020
New Revision: 358396
URL: https://svnweb.freebsd.org/changeset/base/358396

Log:
  Merge commit 2e24219d3 from llvm git (by Hans Wennborg):
  
    [MC][ARM] Resolve some pcrel fixups at assembly time (PR44929)
  
    MC currently does not emit these relocation types, and lld does not
    handle them. Add FKF_Constant as a work-around of some ARM code after
    D72197. Eventually we probably should implement these relocation
    types.
  
    By Fangrui Song!
  
    Differential revision: https://reviews.llvm.org/D72892
  
  This re-enables using the arm 'adr' pseudo instruction on global symbols
  again.  It was broken as a side-effect of upstream commit 2bfee35cb,
  which lead to "error: unsupported relocation on symbol" when assembling
  such constructs, which are used in e.g. sys/arm/arm/locore-v[46].S.
  
  PR:		244251

Modified:
  projects/clang1000-import/contrib/llvm-project/llvm/include/llvm/MC/MCFixupKindInfo.h
  projects/clang1000-import/contrib/llvm-project/llvm/lib/MC/MCAssembler.cpp
  projects/clang1000-import/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

Modified: projects/clang1000-import/contrib/llvm-project/llvm/include/llvm/MC/MCFixupKindInfo.h
==============================================================================
--- projects/clang1000-import/contrib/llvm-project/llvm/include/llvm/MC/MCFixupKindInfo.h	Thu Feb 27 17:13:57 2020	(r358395)
+++ projects/clang1000-import/contrib/llvm-project/llvm/include/llvm/MC/MCFixupKindInfo.h	Thu Feb 27 18:49:49 2020	(r358396)
@@ -22,7 +22,12 @@ struct MCFixupKindInfo {
     FKF_IsAlignedDownTo32Bits = (1 << 1),
 
     /// Should this fixup be evaluated in a target dependent manner?
-    FKF_IsTarget = (1 << 2)
+    FKF_IsTarget = (1 << 2),
+
+    /// This fixup kind should be resolved if defined.
+    /// FIXME This is a workaround because we don't support certain ARM
+    /// relocation types. This flag should eventually be removed.
+    FKF_Constant = 1 << 3,
   };
 
   /// A target specific name for the fixup kind. The names will be unique for

Modified: projects/clang1000-import/contrib/llvm-project/llvm/lib/MC/MCAssembler.cpp
==============================================================================
--- projects/clang1000-import/contrib/llvm-project/llvm/lib/MC/MCAssembler.cpp	Thu Feb 27 17:13:57 2020	(r358395)
+++ projects/clang1000-import/contrib/llvm-project/llvm/lib/MC/MCAssembler.cpp	Thu Feb 27 18:49:49 2020	(r358396)
@@ -224,6 +224,7 @@ bool MCAssembler::evaluateFixup(const MCAsmLayout &Lay
     return getBackend().evaluateTargetFixup(*this, Layout, Fixup, DF, Target,
                                             Value, WasForced);
 
+  unsigned FixupFlags = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags;
   bool IsPCRel = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags &
                  MCFixupKindInfo::FKF_IsPCRel;
 
@@ -239,8 +240,9 @@ bool MCAssembler::evaluateFixup(const MCAsmLayout &Lay
       if (A->getKind() != MCSymbolRefExpr::VK_None || SA.isUndefined()) {
         IsResolved = false;
       } else if (auto *Writer = getWriterPtr()) {
-        IsResolved = Writer->isSymbolRefDifferenceFullyResolvedImpl(
-            *this, SA, *DF, false, true);
+        IsResolved = (FixupFlags & MCFixupKindInfo::FKF_Constant) ||
+                     Writer->isSymbolRefDifferenceFullyResolvedImpl(
+                         *this, SA, *DF, false, true);
       }
     }
   } else {

Modified: projects/clang1000-import/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
==============================================================================
--- projects/clang1000-import/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp	Thu Feb 27 17:13:57 2020	(r358395)
+++ projects/clang1000-import/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp	Thu Feb 27 18:49:49 2020	(r358396)
@@ -55,31 +55,29 @@ Optional<MCFixupKind> ARMAsmBackend::getFixupKind(Stri
 }
 
 const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
+  unsigned IsPCRelConstant =
+      MCFixupKindInfo::FKF_IsPCRel | MCFixupKindInfo::FKF_Constant;
   const static MCFixupKindInfo InfosLE[ARM::NumTargetFixupKinds] = {
       // This table *must* be in the order that the fixup_* kinds are defined in
       // ARMFixupKinds.h.
       //
       // Name                      Offset (bits) Size (bits)     Flags
-      {"fixup_arm_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
+      {"fixup_arm_ldst_pcrel_12", 0, 32, IsPCRelConstant},
       {"fixup_t2_ldst_pcrel_12", 0, 32,
-       MCFixupKindInfo::FKF_IsPCRel |
-           MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
-      {"fixup_arm_pcrel_10_unscaled", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
-      {"fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
+       IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
+      {"fixup_arm_pcrel_10_unscaled", 0, 32, IsPCRelConstant},
+      {"fixup_arm_pcrel_10", 0, 32, IsPCRelConstant},
       {"fixup_t2_pcrel_10", 0, 32,
        MCFixupKindInfo::FKF_IsPCRel |
            MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
       {"fixup_arm_pcrel_9", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"fixup_t2_pcrel_9", 0, 32,
-       MCFixupKindInfo::FKF_IsPCRel |
-           MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
+       IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
       {"fixup_thumb_adr_pcrel_10", 0, 8,
-       MCFixupKindInfo::FKF_IsPCRel |
-           MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
-      {"fixup_arm_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
+       IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
+      {"fixup_arm_adr_pcrel_12", 0, 32, IsPCRelConstant},
       {"fixup_t2_adr_pcrel_12", 0, 32,
-       MCFixupKindInfo::FKF_IsPCRel |
-           MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
+       IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
       {"fixup_arm_condbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
       {"fixup_arm_uncondbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
       {"fixup_t2_condbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel},



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